IDT82P2816BB IDT, Integrated Device Technology Inc, IDT82P2816BB Datasheet - Page 64

• Manufacturer Part Number: IDT82P2816BB
• Description: IC LIU T1/J1/E1 16+1CH 416-PBGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82P2816BB

• Function: Line Interface Unit (LIU)
• Interface: E1, J1, T1
• Number Of Circuits: 1
• Voltage - Supply: 1.8V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: *
• Includes: Defect and Alarm Detection, Driver Over-Current Detection and Protection, LLOS Detection, PRBSARB / IB Detection and Generation
• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Supply: -
• Power (watts): -
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant
• Other names: 82P2816BB

4
4.1
pins to their default value or status.
all the common blocks (including clock generator/synthesizer and micro-
processor interface) and channel-related parts. The Per-channel soft-
ware reset operation resets the channel-related parts. Figure-41 shows
a general overview of the reset options.
RTIPn/RRINGn) are in High-Z state.
Table-26 After Reset Effect Summary
Miscellaneous
IDT82P2816
TTIPn/TRINGn & RTIPn/
RRINGn
Line Interface Mode
System interface
General I/O pins (i.e.,
D[7:0] and GPIO[1:0])
INT
CLKT1, CLKE1, REFA,
REFB
LLOS, LLOS0
TDO, SDO/ ACK /RDY
state machines
Interrupt sources
Registers
The reset operation resets all registers, state machines as well as I/O
The IDT82P2816 provides 4 kinds of reset:
• Power-on reset;
• Hardware reset;
• Global software reset;
• Per-channel software reset.
The Power-on, Hardware and Global software reset operations reset
During reset, all the line interface pins (i.e., TTIPn/TRINGn and
After reset, all the items listed in Table-26 are true.
Effect On ...
MISCELLANEOUS
RESET
Power-On Reset, Hardware Reset and Global Software Reset
All TTIPn/TRINGn & RTIPn/RRINGn pins are in High-Z state.
All channels are reset to T1/J1 mode.
All channels are in Dual Rail NRZ Format.
As input pins.
Open drain output.
Output enable.
Output enable.
High-Z.
All state machines are reset.
All interrupt sources are masked.
All registers are reset to their default value.
16(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
64
clock generator/
synthesizer
Power-on reset
Only TTIPn/TRINGn & RTIPn/RRINGn in the corresponding chan-
nel are in High-Z.
Only the corresponding channel is reset to T1/J1 mode.
Only the corresponding channel is in Dual Rail NRZ Format.
(No effect)
(No effect)
(No effect)
(No effect)
(No effect)
The state machines in the corresponding channel are reset.
The interrupt sources in the corresponding channel are masked.
The registers in the corresponding channel are reset to their
default value except that there is no effect on the T1E1 bit.
Hardware reset Global software reset
microprocessor
Figure-41 Reset
interface
Per-Channel Software Reset
Per-channel software reset
channel
February 6, 2009