DS2155L Maxim Integrated Products, DS2155L Datasheet - Page 157

IC TXRX T1/E1/J1 1-CHIP 100-LQFP

DS2155L

Manufacturer Part Number
DS2155L
Description
IC TXRX T1/E1/J1 1-CHIP 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheets

Specifications of DS2155L

Function
Single-Chip Transceiver
Interface
E1, HDLC, J1, T1
Number Of Circuits
1
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
BERT Generator and Detector, CMI Coder and Decoder, HDLC Controller
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power (watts)
-

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Figure 24-4. Software-Selected Termination, Longitudinal Protection
Table 24-B. Component List (Software-Selected Termination, Longitudinal
Protection)
100/110/120 Ω
Tw isted Pair
100/110/120 Ω
Tw isted Pair
Design Notes:
1
2
Choke is optional but should be included when necessary f or common mode noise reduction.
Decoupling capacitors need to be placed near dev ice power pins
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
S3, S4, S5, S6
T1 and T2
T3 and T4
S1 and S2
S7 and S8
F1 to F4
NAME
F1
F2
F3
F4
T3 and T4 are optional. For more information, contact the Telecom Support Group at
telecom.support@dalsemi.com.
A list of alternate transformer part numbers and manufacturers is available at
telecom.support@dalsemi.com.
The layout from the transformers to the network interface is critical. Traces should be at least 25
mils wide and separated from other circuit lines by at least 150 mils. The area under this portion
of the circuit should not contain power planes.
Some T1 (never in E1) applications source or sink power from the network-side center taps of
the Rx/Tx transformers.
The ground trace connected to the S2/S3 pair and the S4/S5 pair should be at least 50 mils wide
to conduct the extra current from a longitudinal power-cross event.
1.25A slow blow fuse
25V (max) transient suppressor
180V (max) transient suppressor
40V (max) transient suppressor
Transformer 1:1CT and 1:2CT (3.3V, SMT)
Dual common-mode choke (SMT)
S7
S8
S3
S4
S5
S6
T3
T4
1
1
2:1
1:1
T2
DESCRIPTION
T1
157 of 238
60 Ω
S1
S2
1.0 µF
0.1 µF
60 Ω
TTIP
TRING
RTIP
RRING
Dallas Semiconductor
T1/E1/J1 SCT or LIU
DVDD
DVSS
TVDD
TVSS
RVDD
RVSS
0.01 µF
0.1 µF
0.1 µF
2
2
2
VCC
VCC
VCC
0.1 µF
68 µF
2
2

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