DS2155L Maxim Integrated Products, DS2155L Datasheet - Page 69

IC TXRX T1/E1/J1 1-CHIP 100-LQFP

DS2155L

Manufacturer Part Number
DS2155L
Description
IC TXRX T1/E1/J1 1-CHIP 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheets

Specifications of DS2155L

Function
Single-Chip Transceiver
Interface
E1, HDLC, J1, T1
Number Of Circuits
1
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
BERT Generator and Detector, CMI Coder and Decoder, HDLC Controller
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power (watts)
-

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12.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Output Data Format (ODF)
Bit 1/TSYNC I/O Select (TSIO)
Bit 2/TSYNC Mode Select (TSM). Selects frame or multiframe mode for the TSYNC pin. See the timing
diagrams in Section 35.
Bit 3/TSYNC Double-Wide (TSDW). (Note: This bit must be set to 0 when IOCR1.2 = 1 or when IOCR1.1 = 0.)
Bit 4/RSYNC I/O Select (RSIO). (Note: This bit must be set to 0 when ESCR.0 = 0.)
Bit 5/RSYNC Mode Select 1(RSMS1). Selects frame or multiframe pulse when RSYNC pin is in output mode. In
input mode (elastic store must be enabled), multiframe mode is only useful when receive signaling reinsertion is
enabled. See the timing diagrams in Section 35.
Bit 6/RSYNC Mode Select 2 (RSMS2)
Bit 7/RSYNC Multiframe Skip Control (RSMS). Useful in framing format conversions from D4 to ESF. This
function is not available when the receive-side elastic store is enabled. RSYNC must be set to output multiframe
pulses (IOCR1.5 = 1 and IOCR1.4 = 0).
I/O PIN CONFIGURATION OPTIONS
0 = bipolar data at TPOSO and TNEGO
1 = NRZ data at TPOSO; TNEGO = 0
0 = TSYNC is an input
1 = TSYNC is an output
0 = frame mode
1 = multiframe mode
0 = do not pulse double-wide in signaling frames
1 = do pulse double-wide in signaling frames
0 = RSYNC is an output
1 = RSYNC is an input (only valid if elastic store enabled)
0 = frame mode
1 = multiframe mode
T1 Mode: RSYNC pin must be programmed in the output frame mode (IOCR1.5 = 0, IOCR1.4 = 0).
0 = do not pulse double-wide in signaling frames
1 = do pulse double-wide in signaling frames
E1 Mode: RSYNC pin must be programmed in the output multiframe mode (IOCR1.5 = 1, IOCR1.4 = 0).
0 = RSYNC outputs CAS multiframe boundaries
1 = RSYNC outputs CRC4 multiframe boundaries
0 = RSYNC outputs a pulse at every multiframe
1 = RSYNC outputs a pulse at every other multiframe
RSMS
7
0
RSMS2
IOCR1
I/O Configuration Register 1
01h
6
0
RSMS1
5
0
RSIO
4
0
69 of 238
TSDW
3
0
TSM
2
0
TSIO
1
0
ODF
0
0

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