DS3171N+ Maxim Integrated Products, DS3171N+ Datasheet - Page 70

• Manufacturer Part Number: DS3171N+
• Description: TXRX SGL DS3/E3 400PBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3171N+

• Function: Single-Chip Transceiver
• Interface: DS3, E3
• Number Of Circuits: 1
• Voltage - Supply: 3.135 V ~ 3.465 V
• Current - Supply: 273mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 400-BGA
• Includes: DS3 Framers, E3 Framers, HDLC Controller, On-Chip BERTs
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: 90-31710+N00

Figure 10-10
paths available.
Figure 10-10. Loopback Modes
10.5.1.1 Analog Loopback (ALB)
Analog loopback is enabled by setting PORT.CR4.LBM[2:0] = 001. Analog loopback mode will not be enabled
when the port is configured for loop-timed mode (set via the PORT.CR3.LOOPT bit).
The analog loopback is a loopback as close to the pins as possible. When both the TX and RX LIU are enabled, it
loops back TXPn and TXNn to RXPn and RXNn, respectively. If the transmit signals on TXPn and TXNn are not
terminated properly, this loopback path may have data errors or loss of signal. When the LIU is not enabled, it
loops back TLCLKn,TPOSn / TDATn,TNEGn to RLCLKn, RPOSn / RDATn , RNEGn.
Figure 10-11. ALB Mux
Clock Rate
Receive
Transmit
DS3/E3
DS3/E3
TXP
TXN
Adapter
RXP
RXN
LIU
LIU
highlights where each loopback mode is located and gives an overall view of the various loopback
Decoder
Encoder
B3ZS/
HDB3
B3ZS/
HDB3
LIU
LIU
TX
RX
TUA1
TAIS
IEEE P1149.1
JTAG Test
Access Port
FEAC
DS3 / E3
Framer
DS3 / E3
Receive
Transmit
Formatter
Buffer
Trace
Trail
HDLC
70
GEN
UA1
RX BERT
TX BERT
Microprocessor
Interface