SC16C654IA68,529 NXP Semiconductors, SC16C654IA68,529 Datasheet - Page 8

• Manufacturer Part Number: SC16C654IA68,529
• Description: IC UART QUAD W/FIFO 68-PLCC
• Manufacturer: NXP Semiconductors

Specifications of SC16C654IA68,529

• Number Of Channels: 4, QUART
• Fifo's: 64 Byte
• Voltage - Supply: 2.5V, 3.3V, 5V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Package / Case: 68-LCC (J-Lead)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-3282-5; 935270051529; SC16C654IA68-S

Philips Semiconductors
Table 2:
9397 750 11617
Product data
Symbol
A3, A4
CDA, CDB,
CDC, CDD
CLKSEL
CS
CSA, CSB,
CSC, CSD
CTSA, CTSB,
CTSC, CTSD
D0-D2,
D3-D7
DSRA,
DSRB,
DSRC, DSRD
DTRA,
DTRB,
DTRC, DTRD
GND
Pin description
Pin
PLCC68 LQFP64
20, 50
9, 27,
43, 61
30
16
16, 20,
50, 54
11, 25,
45, 59
66-68,
1-5
10, 26,
44, 60
12, 24,
46, 58
6, 23,
40, 57
-
64, 18,
31, 49
-
-
7, 11,
38, 42
2, 16,
33, 47
53-55,
56-60
1, 17,
32, 48
3, 15,
34, 46
14, 28,
45, 61
…continued
Type
I
I
I
I
I
I
I/O
I
O
I
Description
Address 3-4 select bits. When the 68 mode is selected, these pins are used
to address or select individual UARTs (providing CS is a logic 0). In the
16 mode, these pins are re-assigned as chip selects, see CSB and CSC. These
pins are not available on 64-pin packages which operate in the 16 mode only.
Carrier Detect (Active-LOW). These inputs are associated with individual
UART channels A through D. A logic 0 on this pin indicates that a carrier has
been detected by the modem for that channel.
Clock Select. The 1 or 4 pre-scalable clock is selected by this pin. The 1
clock is selected when CLKSEL is a logic 1 (connected to V
selected when CLKSEL is a logic 0 (connected to GND). MCR[7] can override
the state of this pin following reset or initialization (see MCR[7]). This pin is not
available on 64-pin packages which provide MCR[7] selection only.
Chip Select (Active-LOW). In the 68 mode, this pin functions as a multiple
channel chip enable. In this case, all four UARTs (A-D) are enabled when the
CS pin is a logic 0. An individual UART channel is selected by the data contents
of address bits A3-A4. when the 16 mode is selected (68-pin devices), this pin
functions as CSA (see definition under CSA, CSB). This pin is not available on
64-pin packages which operate in the 16 mode only.
Chip Select A, B, C, D (Active-LOW). This function is associated with the
16 mode only, and for individual channels ‘A’ through ‘D’. When in 16 mode,
these pins enable data transfers between the user CPU and the
SC16C654/654D for the channel(s) addressed. Individual UART sections (A, B,
C, D) are addressed by providing a logic 0 on the respective CSA-CSD pin.
When the 68 mode is selected, the functions of these pins are re-assigned.
68 mode functions are described under their respective name/pin headings.
Clear to Send (Active-LOW). These inputs are associated with individual
UART channels A through D. A logic 0 on the CTS pin indicates the modem or
data set is ready to accept transmit data from the SC16C654/654D. Status can
be tested by reading MSR[4]. This pin only affects the transmit or receive
operations when Auto CTS function is enabled via the Enhanced Feature
Register EFR[7] for hardware flow control operation.
Data bus (bi-directional). These pins are the 8-bit, 3-State data bus for
transferring information to or from the controlling CPU. D0 is the least
significant bit and the first data bit in a transmit or receive serial data stream.
Data Set Ready (Active-LOW). These inputs are associated with individual
UART channels, A through D. A logic 0 on this pin indicates the modem or data
set is powered-on and is ready for data exchange with the UART. This pin has
no effect on the UART’s transmit or receive operation.
Data Terminal Ready (Active-LOW). These outputs are associated with
individual UART channels, A through D. A logic 0 on this pin indicates that the
SC16C654/654D is powered-on and ready. This pin can be controlled via the
modem control register. Writing a logic 1 to MCR[0] will set the DTR output to
logic 0, enabling the modem. This pin will be a logic 1 after writing a logic 0 to
MCR[0], or after a reset. This pin has no effect on the UART’s transmit or
receive operation.
Signal and power ground.
Quad UART with 64-byte FIFO and infrared (IrDA) encoder/decoder
Rev. 04 — 19 June 2003
SC16C654/654D
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
CC
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