SC16C754IA68,529 NXP Semiconductors, SC16C754IA68,529 Datasheet - Page 8
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SC16C754IA68,529
Manufacturer Part Number
SC16C754IA68,529
Description
IC UART QUAD W/FIFO 68-PLCC
Manufacturer
NXP Semiconductors
Datasheet
1.SC16C754IA68529.pdf
(49 pages)
Specifications of SC16C754IA68,529
Number Of Channels
4, QUART
Fifo's
64 Byte
Voltage - Supply
2.5V, 3.3V, 5V
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Package / Case
68-LCC (J-Lead)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-3291-5
935270056529
SC16C754IA68-S
935270056529
SC16C754IA68-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SC16C754IA68,529
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
Table 2:
6. Functional description
9397 750 11618
Product data
Symbol
V
XTAL1
XTAL2
CC
Pin description
Pin
LQFP80 PLCC68
6, 46, 66 13, 47,
31
32
6.1 Trigger levels
6.2 Hardware flow control
…continued
64
35
36
The SC16C754 UART is pin-compatible with the SC16C554 and SC16C654 UARTs.
It provides more enhanced features. All additional features are provided through a
special enhanced feature register.
The UART will perform serial-to-parallel conversion on data characters received from
peripheral devices or modems, and parallel-to-parallel conversion on data characters
transmitted by the processor. The complete status of each channel of the SC16C754
UART can be read at any time during functional operation by the processor.
The SC16C754 can be placed in an alternate mode (FIFO mode) relieving the
processor of excessive software overhead by buffering received/transmitted
characters. Both the receiver and transmitter FIFOs can store up to 64 bytes
(including three additional bits of error status per byte for the receiver FIFO) and have
selectable or programmable trigger levels. Primary outputs RXRDY and TXRDY allow
signalling of DMA transfers.
The SC16C754 has selectable hardware flow control and software flow control.
Hardware flow control significantly reduces software overhead and increases system
efficiency by automatically controlling serial data flow using the RTS output and CTS
input signals. Software flow control automatically controls data flow by using
programmable Xon/Xoff characters.
The UART includes a programmable baud rate generator that can divide the timing
reference clock input by a divisor between 1 and (2
The SC16C754 provides independent selectable and programmable trigger levels for
both receiver and transmitter DMA and interrupt generation. After reset, both
transmitter and receiver FIFOs are disabled and so, in effect, the trigger level is the
default value of one byte. The selectable trigger levels are available via the FCR. The
programmable trigger levels are available via the TLR.
Hardware flow control is comprised of Auto-CTS and Auto-RTS. Auto-CTS and
Auto-RTS can be enabled/disabled independently by programming EFR[7:6].
Type
I
I
O
Description
Power supply input.
Crystal or external clock input. Functions as a crystal input or as an
external clock input. A crystal can be connected between XTAL1 and XTAL2
to form an internal oscillator circuit (see
external clock can be connected to this pin to provide custom data rates.
Output of the crystal oscillator or buffered clock. (See also XTAL1.)
XTAL2 is used as a crystal oscillator output or a buffered clock output.
Rev. 04 — 19 June 2003
16
Figure
Quad UART with 64-byte FIFO
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
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SC16C754
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