CY8C5568AXI-060 Cypress Semiconductor Corp, CY8C5568AXI-060 Datasheet - Page 100

• Manufacturer Part Number: CY8C5568AXI-060
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY8C5568AXI-060

• Lead Free Status / Rohs Status: Compliant

11.8 PSoC System Resources
Specifications are valid for –40 °C ≤ T
where noted.
11.8.1 Voltage Monitors
Table 11-65. Voltage Monitors DC Specifications
Table 11-66. Voltage Monitors AC Specifications
11.8.2 Interrupt Controller
Table 11-67. Interrupt Controller AC Specifications
Document Number: 001-66235 Rev. *A
LVI
HVI
Parameter
Parameter
Note
Parameter
40. ARM Cortex-M3 NVIC spec. Visit
Trip voltage
Trip voltage
Response time
Delay from interrupt signal input to ISR
code execution from main line code
Delay from interrupt signal input to ISR
code execution from ISR code
(tail-chaining)
LVI_A/D_SEL[3:0] = 0011b
LVI_A/D_SEL[3:0] = 0100b
LVI_A/D_SEL[3:0] = 0101b
LVI_A/D_SEL[3:0] = 0110b
LVI_A/D_SEL[3:0] = 0111b
LVI_A/D_SEL[3:0] = 1000b
LVI_A/D_SEL[3:0] = 1001b
LVI_A/D_SEL[3:0] = 1010b
LVI_A/D_SEL[3:0] = 1011b
LVI_A/D_SEL[3:0] = 1100b
LVI_A/D_SEL[3:0] = 1101b
LVI_A/D_SEL[3:0] = 1110b
LVI_A/D_SEL[3:0] = 1111b
Description
Description
Description
[40]
www.arm.com
A
≤ 85 °C and T
for detailed documentation about the Cortex-M3 CPU.
PRELIMINARY
[40]
J
≤ 100 °C, except where noted. Specifications are valid for 2.7 V to 5.5 V, except
Conditions
Conditions
Conditions
PSoC
®
5: CY8C55 Family Datasheet
2.38
2.62
2.87
3.35
3.59
3.84
4.08
4.32
4.56
4.83
5.05
5.30
5.57
3.11
Min
Min
Min
–
–
–
2.45
2.71
2.95
3.21
3.46
3.70
3.95
4.20
4.45
4.70
4.98
5.21
5.47
5.75
Typ
Typ
Typ
–
–
–
Max
2.53
3.56
4.59
5.63
12
Max
2.79
3.04
3.31
3.81
4.07
4.33
4.84
5.13
5.37
5.92
Max
6
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Tcy CPU
Tcy CPU
Units
Units
Units
µs
V
V
V
V
V
V
V
V
V
V
V
V
V
V
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