CY8C5568AXI-060 Cypress Semiconductor Corp, CY8C5568AXI-060 Datasheet - Page 50

• Manufacturer Part Number: CY8C5568AXI-060
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY8C5568AXI-060

• Lead Free Status / Rohs Status: Compliant

8.4.1 Input and Output Interface
The positive and negative inputs to the comparators come from the analog global buses, the analog mux line, the analog local bus
and precision reference through multiplexers. The output from each comparator could be routed to any of the two input LUTs. The
output of that LUT is routed to the UDB DSI.
8.4.2 LUT
The CY8C55 family of devices contains four LUTs. The LUT is a
two input, one output lookup table that is driven by any one or
two of the comparators in the chip. The output of any LUT is
routed to the digital system interface of the UDB array. From the
digital system interface of the UDB array, these signals can be
connected to UDBs, DMA controller, I/O, or the interrupt
controller.
The LUT control word written to a register sets the logic function
on the output. The available LUT functions and the associated
control word is shown in
Document Number: 001-66235 Rev. *A
Table 8-2
Routing
Routing
Analog
Analog
From
From
.
comp2
+
comp0
_
+
_
PRELIMINARY
Figure 8-7. Analog Comparator
4
LUT0
4
4
LUT1
4
UDBs
ANAIF
4
Table 8-2. LUT Function vs. Program Word and Inputs
LUT2
4
PSoC
4
LUT3
Control Word
4
0000b
0001b
0010b
0100b
0101b
1000b
1001b
1010b
0011b
0110b
0111b
1011b
1100b
1101b
1110b
1111b
®
comp1
comp3
5: CY8C55 Family Datasheet
_
_
+
+
Output (A and B are LUT inputs)
Routing
Analog
Routing
From
Analog
From
A AND (NOT B)
(NOT A) AND B
A OR (NOT B)
(NOT A) OR B
FALSE (‘0’)
A XNOR B
A NAND B
TRUE (‘1’)
A NOR B
A AND B
A XOR B
A OR B
NOT B
NOT A
A
B
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