CY8C5568AXI-060 Cypress Semiconductor Corp, CY8C5568AXI-060 Datasheet - Page 105

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CY8C5568AXI-060

Manufacturer Part Number
CY8C5568AXI-060
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY8C5568AXI-060

Lead Free Status / Rohs Status
Compliant

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11.9.4 External Crystal Oscillator
Table 11-79. ECO AC Specifications
11.9.5 External Clock Reference
Table 11-80. External Clock Reference AC Specifications
11.9.6 Phase-Locked Loop
Table 11-81. PLL DC Specifications
Table 11-82. PLL AC Specifications
Document Number: 001-66235 Rev. *A
F
I
Fpllin
Fpllout
Jperiod-rms Jitter (rms)
Notes
Parameter
Parameter
Parameter
DD
Parameter
46. Based on device characterization (Not production tested).
47. This specification is guaranteed by testing the PLL across the specified range using the IMO as the source for the PLL.
48. PLL input divider, Q, must be set so that the input frequency is divided down to the intermediate frequency range. Value for Q ranges from 1 to 16.
Crystal frequency range
External frequency range
Input duty cycle range
Input edge rate
PLL operating current
PLL input frequency
PLL intermediate frequency
PLL output frequency
Lock time at startup
[46]
Description
Description
Description
Description
[47]
[47]
[48]
PRELIMINARY
Measured at V
V
In = 3 MHz, Out = 67 MHz
In = 3 MHz, Out = 24 MHz
Output of prescaler
IL
to V
[46]
IH
Conditions
Conditions
Conditions
Conditions
DDIO
PSoC
/2
®
5: CY8C55 Family Datasheet
Min
Min
Min
Min
0.1
4
30
24
0
1
1
Typ
Typ
Typ
400
200
Typ
50
Max
Max
25
Max
Max
Page 105 of 114
250
250
33
70
48
67
3
Units
Units
MHz
MHz
V/ns
Units
Units
MHz
MHz
MHz
%
µA
µA
µs
ps
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