AT32UC3A0512AU Atmel Corporation, AT32UC3A0512AU Datasheet - Page 696

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AT32UC3A0512AU

Manufacturer Part Number
AT32UC3A0512AU
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3A0512AU

Flash (kbytes)
512 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
109
Ext Interrupts
109
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
1
Uart
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3A0512AU-ALTRA
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT32UC3A0512AU-ALUT
Manufacturer:
Atmel
Quantity:
10 000
32058K AVR32-01/12
32.7.12
Register Name:
Access Type:
Only the first 20 bits (internal channel counter size) are significant.
If the waveform is left-aligned, then the output waveform period depends on the counter source clock and can be
calculated:
If the waveform is center-aligned, then the output waveform period depends on the counter source clock and can be
calculated:
CPRD: Channel Period
31
23
15
7
PWM Channel Period Register
30
22
14
6
– By using the Master Clock (MCK) divided by an X given prescaler value (with X being
– By using a Master Clock divided by one of both DIVA or DIVB divider, the formula
– By using the Master Clock (MCK) divided by an X given prescaler value (with X being
– By using a Master Clock divided by one of both DIVA or DIVB divider, the formula
1, 2, 4, 8, 16, 32, 64, 128, 256, 512, or 1024). The resulting period formula will be:
becomes, respectively:
1, 2, 4, 8, 16, 32, 64, 128, 256, 512, or 1024). The resulting period formula will be:
becomes, respectively:
(
------------------------------ -
(
----------------------------------------- -
(
---------------------------------------- - -
(
--------------------------------------------------- - -
X CPRD
CRPD
2
2
×
×
×
MCK
X CPRD
CPRD DIVA
29
21
13
MCK
5
MCK
CPRDx
Read/Write
×
MCK
×
DIVA
)
×
)
)
or
)
(
--------------------------------------------- -
or
CRPD
28
20
12
4
(
--------------------------------------------------- - -
2 CPRD
MCK
×
CPRD
CPRD
CPRD
CPRD
×
DIVAB
MCK
×
)
DIVB
27
19
11
3
)
26
18
10
2
25
17
9
1
AT32UC3A
24
16
8
0
696

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