AT32UC3A3256S Atmel Corporation, AT32UC3A3256S Datasheet - Page 647
AT32UC3A3256S
Manufacturer Part Number
AT32UC3A3256S
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A3256S
Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
AES
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A3256S-ALUT
Manufacturer:
MOLEX
Quantity:
20 000
Part Number:
AT32UC3A3256S-U
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A3128 PDF datasheet #4
- AT32UC3A3128 PDF datasheet #5
- Current page: 647 of 1012
- Download datasheet (16Mb)
26.7.3.6
26.7.3.7
32072G–11/2011
Pipe activation
Address setup
The pipe is maintained inactive and reset (see
disabled (PENn is zero). The Data Toggle Sequence field (DTSEQ) is also reset.
The algorithm represented on
pipe.
Figure 26-23. Pipe Activation Algorithm
As long as the pipe is not correctly configured (UPSTAn.CFGOK is zero), the controller can not
send packets to the device through this pipe.
The UPSTAn.CFGOK bit is set only if the configured size and number of banks are correct com-
pared to their maximal allowed values for the pipe (see
maximal FIFO size (i.e. the DPRAM size).
See
Once the pipe is correctly configured (UPSTAn.CFGOK is zero), only the PTOKEN and INTFRQ
fields can be written by software. INTFRQ is meaningless for non-interrupt pipes.
When starting an enumeration, the user gets the device descriptor by sending a
GET_DESCRIPTOR USB request. This descriptor contains the maximal packet size of the
device default control endpoint (bMaxPacketSize0) and the user re-configures the size of the
default control pipe with this size parameter.
Once the device has answered the first host requests with the default device address 0, the host
assigns a new address to the device. The host controller has to send an USB reset to the device
and to send a SET_ADDRESS(addr) SETUP request with the new address to be used by the
device. Once this SETUP transaction is over, the user writes the new address into the USB Host
Address for Pipe n field in the USB Host Device Address register (UHADDR.UHADDRPn). All
following requests, on all pipes, will be performed using this new address.
Section 26.7.1.6
Pipe Activated
Yes
CFGOK ==
Activation
PENn = 1
UPCFGn
PEPNUM
PTOKEN
INTFRQ
PTYPE
ALLOC
PSIZE
Pipe
for more details about DPRAM management.
PBK
1?
Figure 26-23 on page 647
No
ERROR
Section 26.7.3.5
Enable the pipe.
Configure the pipe:
Allocate the configured DPRAM banks.
Test if the pipe configuration is
correct.
- interrupt request frequency
- endpoint number
- type
- size
- number of banks
must be followed in order to activate a
Table 26-1 on page
for more details) as long as it is
617) and to the
647
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