AT32UC3A364S Atmel Corporation, AT32UC3A364S Datasheet - Page 172
AT32UC3A364S
Manufacturer Part Number
AT32UC3A364S
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A364S
Flash (kbytes)
64 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
AES
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3A364S-ALUT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A3128 PDF datasheet #4
- AT32UC3A3128 PDF datasheet #5
- Current page: 172 of 1012
- Download datasheet (16Mb)
14.6.6
32072G–11/2011
SmartMedia and NAND Flash Support
Figure 14-5. CompactFlash Application Example without I/O mode
The EBI integrates circuitry that interfaces to SmartMedia and NAND Flash devices.
The NAND Flash logic is driven by the Static Memory Controller on the NCS[2] (and/or NCS[3])
address space. Writing to the HMATRIX.SFR6.CS2A (and/or HMATRIX.SFR6.CS3A) bit the
appropriate value enables the NAND Flash logic. Access to an external NAND Flash device is
then made by accessing the address space reserved to NCS[2] (and/or NCS[3]).
The NAND Flash logic drives the read and write command signals of the SMC on the NANDOE
and NANDWE signals when the NCS[2] (and/or NCS[3]) signal is active. NANDOE and
NANDWE are invalidated as soon as the transfer address fails to lie in the NCS[2] (and/or
NCS[3]) address space. See
these waveforms, refer to the SMC Section.
The SmartMedia device is connected the same way as the NAND Flash device.
ADDR[10:0]
DATA[15:0]
EBI
ADDR[22]
CFRNW
CFCE1
CFCE2
NCS[4]
NWAIT
NWE0
NRD
Pxx
Figure 14-6 on page 173
DIR
/OE
/OE
for more informations. For details on
CompactFlash
D[15:0]
_CD1
_CD2
A[10:0]
_REG
_OE
_WE
_IORD
_IOWR
_CE1
_CE2
_WAIT
Connector
172
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