AT32UC3A464 Atmel Corporation, AT32UC3A464 Datasheet - Page 579

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AT32UC3A464

Manufacturer Part Number
AT32UC3A464
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3A464

Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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25.6.10
25.6.10.1
25.6.10.2
25.6.10.3
25.6.10.4
25.6.10.5
25.6.11
25.6.11.1
32072G–11/2011
LIN Errors
LIN Frame Handling
Bit Error (CSR.LINBE)
Slave Not Responding Error (CSR.LINSNRE)
Checksum Error (CSR.LINCE)
Identifier Parity Error (CSR.LINIPE)
Inconsistent Sync Field Error (CSR.LINISFE)
Master Node Configuration
Note:
If the Checksum is sent (CHKDIS=0):
If the Checksum is not sent (CHKDIS=1):
These error bits are cleared by writing a one to CSR.RSTSTA.
This error is generated if no valid message appears within the TFrame_Maximum time frame
slot, while the USART is expecting a response from another node (NACT=SUBSCRIBE).
This error is generated if the received checksum is wrong. This error can only be generated if the
checksum feature is enabled (CHKDIS=0).
This error is generated if the identifier parity is wrong. This error can only be generated if parity is
enabled (PARDIS=0).
This error is generated in slave mode if the Sync Field character received is not 0x55. Synchro-
nization procedure is aborted.
This error is generated if the value transmitted by the USART on Tx differs from the value sam-
pled on Rx. If a bit error is detected, the transmission is aborted at the next byte border.
The following procedure depends on the NACT setting:
• TFrame_Maximum = 1.4 x (THeader_Nominal + TResponse_Nominal + 1)
• TResponse_Nominal = 10 x (NData + 1)
• TFrame_Maximum = 1.4 x (34 + 10 x (DLC + 1 + 1) + 1)
• TFrame_Maximum = 77 + 14 x DLC
• TResponse_Nominal = 10 x NData
• TFrame_Maximum = 1.4 x (34 + 10 x (DLC + 1) + 1)
• TFrame_Maximum = 63 + 14 x DLC
• Write a one to CR.TXEN and CR.RXEN to enable both transmitter and receiver
• Select LIN mode and master node by writing to MR.MODE
• Configure the baud rate by writing to CD and FP in BRGR
• Configure the frame transfer by writing to NACT, PARDIS, CHKDIS, CHKTYPE, DLCM,
• Check that CSR.TXRDY is one
• Send the header by writing to LINIR.IDCHR
FSDIS, and DLC in LINMR
The term “+1” leads to an integer result for TFrame_Max (LIN Specification 1.3)
(Note:)
579

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