AT32UC3L0256 Atmel Corporation, AT32UC3L0256 Datasheet - Page 201

• Manufacturer Part Number: AT32UC3L0256
• Manufacturer: Atmel Corporation

Specifications of AT32UC3L0256

• Flash (kbytes): 256 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32000D–04/2011
LDMTS – Load Multiple Registers for Task Switch
Architecture revision:
Architecture revision1 and higher.
Description
Loads the consecutive words pointed to by Rp into the registers specified in the instruction.The
target registers reside in the User Register Context, regardless of which context the instruction is
called from.
Operation:
I.
Syntax:
I.
Operands:
I.
Status Flags:
Opcode:
Note:
This instruction is intended for performing task switches.
Emtpy Reglist16 gives UNDEFINED result.
PC in Reglist16 gives UNDEFINED result.
R15 R14 R13 R12 R11 R10 R9
31
1
15
Loadaddress ←Rp;
for (i = 15 to 0)
if Opcode[++] == 1 then
ldmts
Reglist16 ∈ {R0, R1, R2, ..., R12, LR, SP}
p ∈ {0, 1, …, 15}
Not affected.
1
29
1
if Reglist16[i] == 1 then
Rp ← Loadaddress;
Rp{++}, Reglist16
28
0
Ri
0
USER
26
1
←*(Loadaddress++);
++
25
R8
24
1
R7
1
R6
1
R5
0
R4
20
0
R3
19
R2
Rp
R1
AVR32
R0
0
16
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