AT32UC3L064 Atmel Corporation, AT32UC3L064 Datasheet - Page 617

• Manufacturer Part Number: AT32UC3L064
• Manufacturer: Atmel Corporation

Specifications of AT32UC3L064

• Flash (kbytes): 64 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

26.9.16
Name:
Access Type:
Offset:
Reset Value:
• CHn: Channel N Disable
32099G–06/2011
CH31
CH23
CH15
CH7
31
23
15
7
Writing a zero to a bit in this register has no effect.
Writing a one to a bit in this register disables the corresponding channel.
Warning: If the corresponding channel is disabled during a conversion, or if it is disabled and then re-enabled during a
conversion, its associated data and its corresponding DRDY and OVRE bits in SR are unpredictable.
The number of available channels is device dependent. Please refer to the Module Configuration section at the end of this
chapter for information regarding how many channels are implemented.
Channel Disable Register
CH30
CH22
CH14
CH6
30
22
14
6
CHDR
Write-only
0x44
0x00000000
CH29
CH21
CH13
CH5
29
21
13
5
CH28
CH20
CH12
CH4
28
20
12
4
CH27
CH19
CH11
CH3
27
19
11
3
CH26
CH18
CH10
CH2
26
18
10
2
AT32UC3L016/32/64
CH25
CH17
CH9
CH1
25
17
9
1
CH24
CH16
CH8
CH0
24
16
8
0
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