AT89C5131A-L Atmel Corporation, AT89C5131A-L Datasheet - Page 137
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AT89C5131A-L
Manufacturer Part Number
AT89C5131A-L
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT89C5130A-M.pdf
(34 pages)
2.AT89C5131A-L.pdf
(4 pages)
3.AT89C5131A-L.pdf
(186 pages)
Specifications of AT89C5131A-L
Flash (kbytes)
32 Kbytes
Max. Operating Frequency
48 MHz
Cpu
8051-12C
Max I/o Pins
34
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
1
Sram (kbytes)
1.25
Eeprom (bytes)
1024
Self Program Memory
API
Operating Voltage (vcc)
3.0 to 3.6
Timers
4
Isp
UART/USB
Watchdog
Yes
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4338F–USB–08/07
Table 93. USBINT Register
USBINT (S:BDh)
USB Global Interrupt Register
Reset Value = 00h
Bit Number
7-6
7
-
5
4
3
2
1
0
Mnemonic Description
WUPCPU
EORINT
SOFINT
SPINT
Bit
6
-
-
-
-
Reserved
The value read from these bits is always 0. Do not set these bits.
Wake Up CPU Interrupt
This bit is set by hardware when the USB controller is in SUSPEND state and is
re-activated by a non-idle signal FROM USB line (not by an upstream resume).
This triggers a USB interrupt when EWUPCPU is set in Table 94 on page 138.
When receiving this interrupt, user has to enable all USB clock inputs.
This bit will be cleared by software (USB clocks must be enabled before).
End Of Reset Interrupt
This bit is set by hardware when a End Of Reset has been detected by the USB
controller. This triggers a USB interrupt when EEORINT is set (see Figure 94 on
page 138).
This bit will be cleared by software.
Start of Frame Interrupt
This bit is set by hardware when an USB Start of Frame PID (SOF) has been
detected. This triggers a USB interrupt when ESOFINT is set (see Table 94 on
page 138).
This bit will be cleared by software.
Reserved
The value read from this bit is always 0. Do not set this bit.
Reserved
The value read from this bit is always 0. Do not set this bit.
Suspend Interrupt
This bit is set by hardware when a USB Suspend (Idle bus for three frame
periods: a J state for 3 ms) is detected. This triggers a USB interrupt when
ESPINT is set in see Table 94 on page 138.
This bit will be cleared by software BEFORE any other USB operation to re-
activate the macro.
WUPCPU
5
EORINT
4
SOFINT
3
2
-
1
-
SPINT
0
137
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