AT89C51RC2 Atmel Corporation, AT89C51RC2 Datasheet - Page 27

• Manufacturer Part Number: AT89C51RC2
• Manufacturer: Atmel Corporation

Specifications of AT89C51RC2

• Flash (kbytes): 32 Kbytes
• Max. Operating Frequency: 60 MHz
• Cpu: 8051-12C
• Max I/o Pins: 32
• Spi: 1
• Uart: 1
• Sram (kbytes): 1.25
• Self Program Memory: API
• Operating Voltage (vcc): 2.7 to 5.5
• Timers: 4
• Isp: UART
• Watchdog: Yes

Programmable Clock-out
Mode
4180E–8051–10/06
Figure 9. Auto-Reload Mode Up/Down Counter (DCEN = 1)
In the clock-out mode, Timer 2 operates as a 50% duty-cycle, programmable clock gen-
erator (see Figure 10). The input clock increments TL2 at frequency F
timer repeatedly counts to overflow from a loaded value. At overflow, the contents of
RCAP2H and RCAP2L registers are loaded into TH2 and TL2. In this mode, Timer 2
overflows do not generate interrupts. The formula gives the clock-out frequency as a
function of the system oscillator frequency and the value in the RCAP2H and RCAP2L
registers:
For a 16 MHz system clock, Timer 2 has a programmable frequency range of 61 Hz
(F
T2 pin (P1.0).
Timer 2 is programmed for the clock-out mode as follows:
•
•
•
•
•
It is possible to use Timer 2 as a baud rate generator and a clock generator simulta-
neously. For this configuration, the baud rates and clock frequencies are not
independent since both functions use the values in the RCAP2H and RCAP2L registers.
Clock O
CLK PERIPH
F
Set T2OE bit in T2MOD register.
Clear C/T2 bit in T2CON register.
Determine the 16-bit reload value from the formula and enter it in RCAP2H/RCAP2L
registers.
Enter a 16-bit initial value in timer registers TH2/TL2. It can be the same as the
reload value or a different one depending on the application.
To start the timer, set TR2 run control bit in T2CON register.
CLK PERIPH
–
utFrequency
/2
16
)
to 4 MHz (F
=
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4
CLK PERIPH
×
:
6
(
65536 RCAP2H RCAP2L
(UP COUNTING RELOAD VALUE)
(DOWN COUNTING RELOAD VALUE)
F
/4). The generated clock signal is brought out to
–
T2
CLKPERIPH
RCAP2L
(8-bit)
(8-bit)
(
8 -bit)
TL2
FFh
T2CON
RCAP2H
C/T2
(8-bit)
(8-bit)
TH2
(8-bit)
0
FFh
1
⁄
AT89C51RB2/RC2
T2CON
TR2
)
T2EX:
if DCEN = 1, 1 = UP
if DCEN = 1, 0 = DOWN
if DCEN = 0, up counting
TOGGLE
T2CON
TF2
CLK PERIPH
T2CON
EXF2
INTERRUPT
TIMER 2
/2. The
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