AT89C51RC2 Atmel Corporation, AT89C51RC2 Datasheet - Page 96

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AT89C51RC2

Manufacturer Part Number
AT89C51RC2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51RC2

Flash (kbytes)
32 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
32
Spi
1
Uart
1
Sram (kbytes)
1.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART
Watchdog
Yes

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Functional Description
Software Security Bits (SSB)
96
AT89C51RB2/RC2
The SSB protects any Flash access from ISP command.
The command "Program Software Security bit" can only write a higher priority level.
There are three levels of security:
This is the default level.
From level 0, one can write level 1 or level 2.
For this level it is impossible to write in the Flash memory, BSB and SBV.
The Bootloader returns ’P’ on write access.
From level 1, one can write only level 2.
The level 2 forbids all read and write accesses to/from the Flash/EEPROM memory.
The Bootloader returns ’L’ on read or write access.
Only a full chip erase in parallel mode (using a programmer) or ISP command can reset
the software security bits.
From level 2, one cannot read and write anything.
Table 71. Software Security Byte Behavior
Flash/EEPROM
Bootloader Info
Full-chip Erase
Manufacturer
Blank Check
Erase Block
BSB & SBV
level 0: NO_SECURITY (FFh)
level 1: WRITE_SECURITY (FEh )
level 2: RD_WR_SECURITY (FCh
Fuse Bit
SSB
Info
Read only access allowed
Read only access allowed
Any access allowed
Any access allowed
Any access allowed
Any access allowed
Level 0
Allowed
Allowed
Allowed
Read only access allowed
Read only access allowed
Read only access allowed
Read only access allowed
Read only access allowed
Write level 2 allowed
Not allowed
Level 1
Allowed
Allowed
Read only access allowed
Read only access allowed
Read only access allowed
Any access not allowed
Any access not allowed
Any access not allowed
Not allowed
Level 2
Allowed
Allowed
4180E–8051–10/06

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