AT89LP51 Atmel Corporation, AT89LP51 Datasheet - Page 54

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AT89LP51

Manufacturer Part Number
AT89LP51
Description
Manufacturer
Atmel Corporation
Datasheet

Specifications of AT89LP51

Flash (kbytes)
4 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-1C
Max I/o Pins
36
Uart
1
Sram (kbytes)
0.25
Eeprom (bytes)
256
Self Program Memory
IAP
Operating Voltage (vcc)
2.4 to 5.5
Timers
3
Isp
SPI
Watchdog
Yes

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Figure 12-2. Timer 2 Diagram: Auto-Reload Mode (DCEN = 0)
Figure 12-3. Timer 2 Waveform: Auto-Reload Mode (DCEN = 0)
12.3.2
Figure 12-4. Timer 2 Waveform: Auto-Reload Mode (DCEN = 1)
54
AT89LP51/52
Up or Down Counter
OSC
BOTTOM
BOTTOM
÷CDV
T2EX
EXF2
Setting DCEN = 1 enables Timer 2 to count up or down, as shown in
the T2EX pin controls the direction of the count (if EXEN2 = 1). A logic 1 at T2EX makes Timer 2
count up. When T2CM
also causes BOTTOM, the 16-bit value in RCAP2H and RCAP2L, to be reloaded into the timer
registers, TH2 and TL2, respectively. A logic 0 at T2EX makes Timer 2 count down. The timer
underflows when TH2 and TL2 equal BOTTOM, the 16-bit value stored in RCAP2H and
RCAP2L. The underflow sets the TF2 bit and causes MAX to be reloaded into the timer regis-
ters. The EXF2 bit toggles whenever Timer 2 overflows or underflows and can be used as a 17th
bit of resolution. In this operating mode, EXF2 does not flag an interrupt.
The behavior of Timer 2 when DCEN is enabled is shown in
MAX
MAX
MIN
MIN
÷TPS
1-0
= 00B, the timer will overflow at MAX and set the TF2 bit. This overflow
TL2
TH2
Figure
TF2 Set
TF2 Set
12-4.
Figure
12-5. In this mode,
3709D–MICRO–12/11

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