AT89LP6440 Atmel Corporation, AT89LP6440 Datasheet - Page 35

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AT89LP6440

Manufacturer Part Number
AT89LP6440
Description
Manufacturer
Atmel Corporation
Datasheet

Specifications of AT89LP6440

Flash (kbytes)
64 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-1C
Max I/o Pins
38
Spi
1
Twi (i2c)
1
Uart
1
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
153.8
Sram (kbytes)
4.25
Eeprom (bytes)
8192
Self Program Memory
IAP
Operating Voltage (vcc)
2.4 to 3.6
Timers
3
Isp
SPI/OCD
Watchdog
Yes

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7.2
7.3
3706C–MICRO–2/11
Brown-out Reset
External Reset
meet the minimum system requirements before the device exits reset and starts normal opera-
tion. The RST pin may be held low externally until these conditions are met.
Table 7-1.
The AT89LP3240/6440 has an on-chip Brown-out Detection (BOD) circuit for monitoring the V
level during operation by comparing it to a fixed trigger level. The trigger level V
is nominally 2.0V. The purpose of the BOD is to ensure that if V
speed, the system will gracefully enter reset without the possibility of errors induced by incorrect
execution. A BOD sequence is shown in
trigger level V
trigger level plus about 200 mV of hysteresis, the start-up timer releases the internal reset after
the specified time-out period has expired
by setting the BOD Enable Fuse.
Figure 7-3.
The AT89LP3240/6440 allows for a wide V
ficient to prevent incorrect execution if V
as when a 3.6V supply is coupled with high frequency operation. In such cases an external
Brown-out Reset circuit connected to the RST pin may be required.
The P4.2/RST pin can function as either an active-LOW reset input or as a digital general-
purpose I/O, P4.2. The Reset Pin Enable Fuse, when set to “1”, enables the external reset input
function on P4.2.
used as an input or output pin. When configured as a reset input, the pin must be held low for at
least two clock cycles to trigger the internal reset. The RST pin includes an on-chip pull-up resis-
tor tied to V
Time-out
SUT Fuse 1
Internal
Reset
V
0
0
1
1
DD
DD
. The pull-up is disabled when the pin is configured as P4.2.
BOD
Start-up Timer Settings
Brown-out Detector Reset
V POR
, the internal reset is immediately activated. When V
(See “User Configuration Fuses” on page
SUT Fuse 0
0
1
0
1
(See “User Configuration Fuses” on page
Clock Source
Internal RC/External Clock
Crystal Oscillator
Internal RC/External Clock
Crystal Oscillator
Internal RC/External Clock
Crystal Oscillator
Internal RC/External Clock
Crystal Oscillator
BOD
Figure
(Table
DD
is lower than the minimum required V
operating range. The on-chip BOD may not be suf-
V BOD
t SUT
7-3. When V
7-1). The Brown-out Detector must be enabled
DD
164.) When cleared, P4.2 may be
AT89LP3240/6440
DD
decreases to a value below the
fails or dips while executing at
DD
increases above the
164.)
t
SUT
BOD
DD
16384
(± 5%) µs
1024
2048
1024
4096
4096
512
16
for the BOD
range, such
35
DD

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