AT89LP828 Atmel Corporation, AT89LP828 Datasheet - Page 37

• Manufacturer Part Number: AT89LP828
• Manufacturer: Atmel Corporation

Specifications of AT89LP828

• Flash (kbytes): 8 Kbytes
• Max. Operating Frequency: 25 MHz
• Cpu: 8051-1C
• Max I/o Pins: 30
• Spi: 1
• Uart: 1
• Sram (kbytes): 0.75
• Eeprom (bytes): 1024
• Self Program Memory: IAP
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 3
• Isp: SPI/OCD
• Watchdog: Yes

10.1.2
10.1.3
3654A–MICRO–8/09
Input-only Mode
Open-drain Output
The input only port configuration is shown in
input includes a Schmitt-triggered input for improved input noise rejection. The input circuitry of
P3.2, P3.3, P3.6, P4.0 and P4.1 is not disabled during Power-down (see
fore these pins should not be left floating during Power-down when configured in this mode.
Figure 10-2. Input Only
Figure 10-3. Input Circuit for P3.2, P3.3 and P3.6
The open-drain output configuration turns off all pull-ups and only drives the pull-down transistor
of the port pin when the port latch contains a logic “0”. To be used as a logic output, a port con-
figured in this manner must have an external pull-up, typically a resistor tied to V
down for this mode is the same as for the quasi-bidirectional mode. The open-drain port configu-
ration is shown in
Power-down (see
down when configured in this mode.
Figure 10-4. Open-drain Output
From Port
Register
Figure
Figure
Input
Data
Input
Data
10-3) and therefore these pins should not be left floating during Power-
10-4. The input circuitry of P3.2, P3.3 and P3.6 is not disabled during
PWD
Input
Data
Figure
PWD
10-2. The output drivers are tristated. The
AT89LP428/828
Port
Pin
Port
Pin
Figure
Port
Pin
10-3) and there-
CC
. The pull-
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