AT90PWM316 Atmel Corporation, AT90PWM316 Datasheet - Page 223
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AT90PWM316
Manufacturer Part Number
AT90PWM316
Description
Manufacturer
Atmel Corporation
Specifications of AT90PWM316
Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
4
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
3
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 105
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
1
Pwm Channels
12
32khz Rtc
No
Calibrated Rc Oscillator
Yes
Available stocks
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Manufacturer
Quantity
Price
Company:
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AT90PWM316-16MU
Manufacturer:
SEAGATE
Quantity:
264
Part Number:
AT90PWM316-16MU
Manufacturer:
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Quantity:
20 000
Part Number:
AT90PWM316-16MUR
Manufacturer:
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Quantity:
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Part Number:
AT90PWM316-16SU
Manufacturer:
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Quantity:
20 000
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19.5.5.1
19.5.5.2
19.6
19.6.1
19.6.2
19.6.2.1
19.6.2.2
7710F–AVR–09/11
EUSART Registers Description
USART I/O Data Register – UDR
EUSART I/O Data Register – EUDR
Parity Checker
OverRun
UDR/EUDR data access with character size up to 8 bits
UDR/EUDR data access with 9 bits per character
All the receiver error flags are valid only when the RxC bit is set and until the UDR register is
read.
The parity checker of the EUSART is available only when data bits are level encoded and
behaves as is USART mode (See Parity checker of the USART).
The Data OverRun (DOR bit of USCRA) flag indicates data loss due to a receiver buffer full con-
dition. This flag operates as in USART mode (See USART section).
• Bit 7:0 – RxB7:0: Receive Data Buffer (read access)
• Bit 7:0 – TxB7:0: Transmit Data Buffer (write access)
This register is common to the USART and EUSART interfaces for Transmit Data Buffer Regis-
ter and Receive Data Buffer Register. See description for UDR register in USART.
• Bit 7:0 – RxB15:8: Receive Data Buffer (read access)
• Bit 7:0 – TxB15:8: Transmit Data Buffer (write access)
This register provide an extension to the UDR register when EUSART is used with more than 8
bits.
When the EUSART is used with 8 or less bits, only the UDR register is used for dta access.
When the EUSART is used with 9 bits character, the behavior is different of the standart USART
mode, the UDR register is used in combinaison with the first bit of EUDR (EUDR:0) for data
access, the RxB8/TxB8 bit is not used.
Initial Value
Initial Value
Read/Write
Read/Write
Bit
Bit
R/W
R/W
7
0
7
0
R/W
R/W
6
0
6
0
R/W
R/W
5
0
5
0
R/W
R/W
4
0
4
0
RXB[15:8]
TXB[15:8]
RXB[7:0]
TXB[7:0]
R/W
R/W
3
0
3
0
R/W
R/W
2
0
2
1
AT90PWM216/316
R/W
R/W
1
0
1
0
R/W
R/W
0
0
0
0
EUDR (Read)
EUDR (Write)
UDR (Write)
UDR (Read)
223
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