ATmega8515 Atmel Corporation, ATmega8515 Datasheet - Page 117
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ATmega8515
Manufacturer Part Number
ATmega8515
Description
Manufacturer
Atmel Corporation
Specifications of ATmega8515
Flash (kbytes)
8 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
35
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
3
Input Capture Channels
1
Pwm Channels
3
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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Timer/Counter Timing
Diagrams
2512K–AVR–01/10
The Timer/Counter is a synchronous design and the timer clock (clk
shown as a clock enable signal in the following figures. The figures include information
on when Interrupt Flags are set, and when the OCR1x Register is updated with the
OCR1x buffer value (only for modes utilizing double buffering). Figure 56 shows a timing
diagram for the setting of OCF1x.
Figure 56. Timer/Counter Timing Diagram, Setting of OCF1x, no Prescaling
Figure 57 shows the same timing data, but with the prescaler enabled.
Figure 57. Timer/Counter Timing Diagram, Setting of OCF1x, with Prescaler (f
Figure 58 shows the count sequence close to TOP in various modes. When using phase
and frequency correct PWM mode the OCR1x Register is updated at BOTTOM. The
timing diagrams will be the same, but TOP should be replaced by BOTTOM, TOP-1 by
BOTTOM+1 and so on. The same renaming applies for modes that set the TOV1 Flag
at BOTTOM.
TCNTn
OCRnx
OCFnx
OCRnx
(clk
TCNTn
OCFnx
(clk
clk
clk
clk
clk
I/O
I/O
I/O
Tn
I/O
Tn
/1)
/8)
OCRnx - 1
OCRnx - 1
OCRnx
OCRnx
OCRnx Value
OCRnx Value
OCRnx + 1
OCRnx + 1
ATmega8515(L)
T1
) is therefore
OCRnx + 2
OCRnx + 2
clk_I/O
117
/8)