ATtiny85 Atmel Corporation, ATtiny85 Datasheet - Page 63

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ATtiny85

Manufacturer Part Number
ATtiny85
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny85

Flash (kbytes)
8 Kbytes
Pin Count
8
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
3
Hardware Qtouch Acquisition
No
Max I/o Pins
6
Ext Interrupts
6
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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2586N–AVR–04/11
• Port B, Bit 4 – XTAL2/CLKO/ADC2/OC1B/PCINT4
• Port B, Bit 3 – XTAL1/CLKI/ADC3/OC1B/PCINT3
• Port B, Bit 2 – SCK/ADC1/T0/USCK/SCL/INT0/PCINT2
• Port B, Bit 1 – MISO/AIN1/OC0B/OC1A/DO/PCINT1
• XTAL2: Chip Clock Oscillator pin 2. Used as clock pin for all chip clock sources except
• CLKO: The devided system clock can be output on the pin PB4. The divided system clock will
• ADC2: Analog to Digital Converter, Channel 2
• OC1B: Output Compare Match output: The PB4 pin can serve as an external output for the
• PCINT4: Pin Change Interrupt source 4.
• XTAL1: Chip Clock Oscillator pin 1. Used for all chip clock sources except internal
• CLKI: Clock Input from an external clock source, see
• ADC3: Analog to Digital Converter, Channel 3
• OC1B: Inverted Output Compare Match output: The PB3 pin can serve as an external output
• PCINT3: Pin Change Interrupt source 3.
• SCK: Master Clock output, Slave Clock input pin for SPI channel. When the SPI is enabled as
• ADC1: Analog to Digital Converter, Channel 1
• T0: Timer/Counter0 counter source.
• USCK: Three-wire mode Universal Serial Interface Clock.
• SCL: Two-wire mode Serial Clock for USI Two-wire mode.
• INT0: External Interrupt source 0.
• PCINT2: Pin Change Interrupt source 2.
• MISO: Master Data input, Slave Data output pin for SPI channel. When the SPI is enabled as
• AIN1: Analog Comparator Negative Input. Configure the port pin as input with the internal
• OC0B: Output Compare Match output. The PB1 pin can serve as an external output for the
internal calibrateble RC Oscillator and external clock. When used as a clock pin, the pin can
not be used as an I/O pin. When using internal calibratable RC Oscillator or External clock as
a Chip clock sources, PB4 serves as an ordinary I/O pin.
be output if the CKOUT Fuse is programmed, regardless of the PORTB4 and DDB4 settings.
It will also be output during reset.
Timer/Counter1 Compare Match B when configured as an output (DDB4 set). The OC1B pin
is also the output pin for the PWM mode timer function.
calibrateble RC oscillator. When used as a clock pin, the pin can not be used as an I/O pin.
for the Timer/Counter1 Compare Match B when configured as an output (DDB3 set). The
OC1B pin is also the inverted output pin for the PWM mode timer function.
a Slave, this pin is configured as an input regardless of the setting of DDB2. When the SPI is
enabled as a Master, the data direction of this pin is controlled by DDPB2. When the pin is
forced by the SPI to be an input, the pull-up can still be controlled by the PORTB2 bit.
a Master, this pin is configured as an input regardless of the setting of DDB1. When the SPI
is enabled as a Slave, the data direction of this pin is controlled by DDB1. When the pin is
forced by the SPI to be an input, the pull-up can still be controlled by the PORTB1 bit.
pull-up switched off to avoid the digital port function from interfering with the function of the
Analog Comparator.
Timer/Counter0 Compare Match B. The PB1 pin has to be configured as an output (DDB1
.
.
.
“External Clock” on page
ATtiny25/45/85
26.
63

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