M55800A Atmel Corporation, M55800A Datasheet - Page 138
M55800A
Manufacturer Part Number
M55800A
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(153 pages)
3.M55800A.pdf
(29 pages)
4.M55800A.pdf
(256 pages)
5.M55800A.pdf
(28 pages)
Specifications of M55800A
Flash (kbytes)
0 Kbytes
Pin Count
176
Max. Operating Frequency
33 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
58
Ext Interrupts
58
Usb Speed
No
Usb Interface
No
Spi
1
Uart
3
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
72
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3/5.0
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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Debug Interface
5.8
5.8.1
5-16
Debug Communications Channel
DCC registers
The ARM7TDMI processor EmbeddedICE Logic contains a DCC to pass information
between the target and the host debugger. This is implemented as coprocessor 14
(CP14).
The DCC comprises:
•
•
•
These registers are located in fixed locations in the EmbeddedICE Logic register map,
as shown in Figure B-7 on page B-41, and are accessed from the processor using MCR
and MRC instructions to coprocessor 14.
The following sections describe:
•
•
The DCC control register is read-only. It controls synchronized handshaking between
the processor and the debugger. The control register format is shown in Figure 5-6.
a 32-bit communications data read register
a 32-bit wide communications data write register
a 6-bit communications control register for synchronized handshaking between
the processor and the asynchronous debugger.
DCC registers on page 5-16
Communications through the DCC on page 5-17.
Copyright © 1994-2001. All rights reserved.
EmbeddedICE
31 30 29 28 27
0
version
0
0
1
•
Reserved
Figure 5-6 DCC control register format
2
• W R
Control
1
bits
0
DCC data read register
DCC data write register
ARM DDI 0029G
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