SAM3N4C Atmel Corporation, SAM3N4C Datasheet - Page 34
SAM3N4C
Manufacturer Part Number
SAM3N4C
Description
Manufacturer
Atmel Corporation
Specifications of SAM3N4C
Flash (kbytes)
256 Kbytes
Pin Count
100
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
24
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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9.2
9.3
34
APB/AHB Bridge
Peripheral Signal Multiplexing on I/O Lines
SAM3N
The SAM3N4/2/1 product embeds one peripheral bridge:
The peripherals of the bridge are clocked by MCK.
The SAM3N product features 2 PIO controllers (48-pin and 64-pin version) or 3 PIO controllers
(100-pin version), PIOA, PIOB and PIOC, that multiplex the I/O lines of the peripheral set.
The SAM3N 64-pin and 100-pin PIO Controller controls up to 32 lines (see
ing on PIO Controller A (PIOA),” on page
peripheral functions: A, B or C. The multiplexing tables in the following paragraphs define how
the I/O lines of the peripherals A, B and C are multiplexed on the PIO Controllers. The column
“Comments” has been inserted in this table for the user’s own comments; it may be used to track
how pins are defined in an application.
Note that some peripheral functions which are output only, might be duplicated within the tables.
35). Each line can be assigned to one of three
Table 9-2, “Multiplex-
11011A–ATARM–04-Oct-10
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