SAM3N4C Atmel Corporation, SAM3N4C Datasheet - Page 629

• Manufacturer Part Number: SAM3N4C
• Manufacturer: Atmel Corporation

Specifications of SAM3N4C

• Flash (kbytes): 256 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 48 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 79
• Ext Interrupts: 79
• Quadrature Decoder Channels: 2
• Usb Speed: No
• Usb Interface: No
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 24
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32.5.2
11011A–ATARM–04-Oct-10
Power Management
All of the PWM outputs may or may not be enabled. If an application requires only four channels,
then only four PIO lines will be assigned to PWM outputs.
Table 32-2.
The PWM is not continuously clocked. The programmer must first enable the PWM clock in the
Power Management Controller (PMC) before using the PWM. However, if the application does
not require PWM operations, the PWM clock can be stopped when not needed and be restarted
later. In this case, the PWM will resume its operations where it left off.
Configuring the PWM does not require the PWM clock to be enabled.
Instance
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
I/O Lines
Signal
PWM0
PWM0
PWM0
PWM0
PWM0
PWM0
PWM0
PWM1
PWM1
PWM1
PWM1
PWM1
PWM1
PWM2
PWM2
PWM2
PWM2
PWM2
PWM2
PWM3
PWM3
PWM3
PWM3
PWM3
I/O Line
PC18
PC22
PC19
PC10
PC20
PC11
PC21
PB14
PA11
PA23
PA12
PA24
PA13
PA25
PA14
PB0
PC8
PB1
PC9
PB4
PA0
PA1
PA2
PA7
SAM3N
Peripheral
A
B
B
A
B
B
B
A
B
B
A
B
B
A
B
B
B
B
B
B
B
B
B
B
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