SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 620
SAM9M10
Manufacturer Part Number
SAM9M10
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9261.pdf
(248 pages)
3.SAM9M10.pdf
(59 pages)
4.SAM9M10.pdf
(1398 pages)
Specifications of SAM9M10
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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33.5
Table 33-1.
33.6
33.6.1
33.6.2
33.6.3
620
Pin Name
RF
RK
RD
TF
TK
TD
Pin Name List
Product Dependencies
SAM9M10
I/O Lines
Power Management
Interrupt
I/O Lines Description
The pins used for interfacing the compliant external devices may be multiplexed with PIO lines.
Before using the SSC receiver, the PIO controller must be configured to dedicate the SSC
receiver I/O lines to the SSC peripheral mode.
Before using the SSC transmitter, the PIO controller must be configured to dedicate the SSC
transmitter I/O lines to the SSC peripheral mode.
Table 33-2.
The SSC is not continuously clocked. The SSC interface may be clocked through the Power
Management Controller (PMC), therefore the programmer must first configure the PMC to
enable the SSC clock.
The SSC interface has an interrupt line connected to the Advanced Interrupt Controller (AIC).
Handling interrupts requires programming the AICbefore configuring the SSC.
Instance
Pin Description
Receiver Frame Synchro
Receiver Clock
Receiver Data
Transmitter Frame Synchro
Transmitter Clock
Transmitter Data
SSC0
SSC0
SSC0
SSC0
SSC0
SSC0
SSC1
SSC1
SSC1
SSC1
SSC1
SSC1
I/O Lines
Signal
RD0
RK0
RD1
RK1
RF0
TD0
TK0
RF1
TD1
TF1
TK1
TF0
I/O Line
PD11
PD15
PD13
PD10
PD14
PD12
PD3
PD5
PD4
PD2
PD1
PD0
Peripheral
Input/Output
Input/Output
Input/Output
Input/Output
6355D–ATARM–7-Sep-11
Output
Type
Input
A
A
A
A
A
A
A
A
A
A
A
A
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