SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 182
SAM9RL64
Manufacturer Part Number
SAM9RL64
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9260.pdf
(290 pages)
3.SAM9261.pdf
(248 pages)
4.SAM9R64.pdf
(903 pages)
5.SAM9R64.pdf
(52 pages)
Specifications of SAM9RL64
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
118
Ext Interrupts
118
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
5
Ssc
2
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
220
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- SAM9260 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9R64 PDF datasheet #4
- SAM9R64 PDF datasheet #5
- Current page: 182 of 248
- Download datasheet (2Mb)
Debug Support
11.1
11.1.1
11.1.2
11-2
About debug support
Debug clocks
Scan chain 15
Debug support is implemented by using the ARM9EJ-S core embedded within the
ARM926EJ-S processor. Full details of the debug support provided by the ARM9EJ-S
core are described in the ARM9EJ-S Technical Reference Manual.
Debug support for the ARM926EJ-S memory system is implemented by extending the
debug facilities providing access to CP15 using an ARM9EJ-S external scan chain (scan
chain 15). This scan chain is external to the ARM9EJ-S core but internal to the
ARM926EJ-S processor.
The system and test clocks must be synchronized externally to the ARM926EJ-S
macrocell. To synchronize off-chip debug clocking with the ARM926EJ-S macrocell
requires a three-state synchronizer. This is described in the debug chapter of the
ARM9EJ-S Technical Reference Manual.
Scan chain 15 enables access to the CP15 registers. Scan chain 15 is 48 bits long.
Table 11-1 shows the bit assignments for scan chain 15.
With scan chain 15 selected, TDI is connected to bit 47 and TDO is connected to bit 0.
Copyright © 2001-2003 ARM Limited. All rights reserved.
Bits
[47]
[46:33]
[32]
[31:0]
Table 11-1 Scan chain 15 format
Write, not read (W/R)
Register address
Initiate access/access complete
When written:
1 = initiate new access
0 = NOP
When read:
1 = access complete
0 = access incomplete
Data value
Function
ARM DDI0198D
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