SAM3N0B Atmel Corporation, SAM3N0B Datasheet - Page 451
SAM3N0B
Manufacturer Part Number
SAM3N0B
Description
Manufacturer
Atmel Corporation
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27.8.3
Name:
Address:
Access:
• RD: Receive Data
Data received by the SPI Interface is stored in this register right-justified. Unused bits read zero.
• PCS: Peripheral Chip Select
In Master Mode only, these bits indicate the value on the NPCS pins at the end of a transfer. Otherwise, these bits read
zero.
Note:
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
31
23
15
–
–
7
When using variable peripheral select mode (PS = 1 in SPI_MR) it is mandatory to also set the WDRBT field to 1 if the
SPI_RDR PCS field is to be processed.
SPI Receive Data Register
30
22
14
SPI_RDR
0x40008008
Read-only
–
–
6
29
21
13
–
–
5
28
20
12
–
–
4
RD
RD
27
19
11
–
3
26
18
10
–
2
PCS
25
17
–
9
1
SAM3N
SAM3N
24
16
–
8
0
451
451
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