SAM3N0B Atmel Corporation, SAM3N0B Datasheet - Page 727

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SAM3N0B

Manufacturer Part Number
SAM3N0B
Description
Manufacturer
Atmel Corporation
Datasheets
Figure 35-19. Two-wire Serial Bus Timing
35.8.6
The maximum operating frequency is given in tables
time when the processor is fetching code out of it. The tables
frequency depending on the field FWS of the MC_FMR register. This field defines the number of wait states required to
access the Embedded Flash Memory.
Table 35-40. Embedded Flash Wait State VDDCORE set at 1.65V
Table 35-41. Embedded Flash Wait State VDDCORE set at 1.80V
Table 35-42. AC Flash Characteristics
11011A–ATARM–04-Oct-10
TWCK
Parameter
Program Cycle Time
Full Chip Erase
Data Retention
Endurance
TWD
Embedded Flash Characteristics
t
SU;STA
FWS
FWS
0
1
2
0
1
2
t
HD;STA
Conditions
per page including auto-erase
per page without auto-erase
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Write/Erase cycles @ 25°C
Write/Erase cycles @ 85°C
t
t
of
LOW
Read Operations
Read Operations
2 cycles
3 cycles
2 cycles
3 cycles
1 cycle
1 cycle
t
HIGH
t
HD;DAT
35-40
and
35-40
t
LOW
35-41
and
below but is limited by the Embedded Flash access
t
SU;DAT
35-41
Min
10K
10
Maximum Operating Frequency (MHz)
Maximum Operating Frequency (MHz)
below give the device maximum operating
30K
Typ
10
21
32
48
24
42
62
t
SU;STO
Max
11.5
t
4.6
2.3
r
SAM3N
cycles
Units
Years
t
BUF
ms
ms
ms
727

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