AD7193 Analog Devices, AD7193 Datasheet - Page 7
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AD7193
Manufacturer Part Number
AD7193
Description
4-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA
Manufacturer
Analog Devices
Datasheet
1.AD7193.pdf
(56 pages)
Specifications of AD7193
Resolution (bits)
24bit
# Chan
4
Sample Rate
n/a
Interface
Ser,SPI
Analog Input Type
Diff-Uni,SE-Uni,Usr-Defined Range/Offset
Ain Range
± (Vref/Gain)
Adc Architecture
Sigma-Delta
Pkg Type
SOP
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Data Sheet
Parameter
SYSTEM CALIBRATION
POWER REQUIREMENTS
1
2
3
4
5
6
7
Temperature range: −40°C to +105°C.
Specification is not production tested but is supported by characterization data at initial product release.
FS[9:0] is the decimal equivalent of Bit FS9 to Bit FS0 in the mode register.
Following a system or internal zero-scale calibration, the offset error is in the order of the noise for the programmed gain and output data rate selected. A system full-
scale calibration reduces the gain error to the order of the noise for the programmed gain and output data rate.
The analog inputs are configured for differential mode.
REJ60 is a bit in the mode register. When the first notch of the sinc filter is at 50 Hz, a notch is placed at 60 Hz when REJ60 is set to 1. This gives simultaneous
50 Hz/60 Hz rejection.
Digital inputs equal to DV
Full-Scale Calibration Limit
Zero-Scale Calibration
Input Span
Power Supply Voltage
AV
DV
Power Supply Currents
Limit
AI
DI
I
DD
DD
DD
DD
DD
− AGND
− DGND
Current
Current
2
7
DD
or DGND.
Min
−1.05 × FS
0.8 × FS
3
2.7
Typ
0.85
1
2.8
3.2
3.8
4.3
0.35
0.5
1.5
Rev. C | Page 7 of 56
Max
1.05 × FS
2.1 × FS
5.25
5.25
1
1.25
3.6
3.9
4.7
5.3
0.4
0.6
3
Unit
V
V
V
V
V
mA
mA
mA
mA
mA
mA
mA
mA
mA
µA
Test Conditions/Comments
Gain = 1, buffer off
Gain = 1, buffer on
Gain = 8, buffer off
Gain = 8, buffer on
Gain = 16 to 128, buffer off
Gain = 16 to 128, buffer on
DV
DV
External crystal used
Power-down mode
DD
DD
= 3 V
= 5 V
1
AD7193