AD7699 Analog Devices, AD7699 Datasheet
AD7699
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AD7699 Summary of contents
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... AD7949 4 AD7682 8 AD7689 AD7699 is an 8-channel, 16-bit, charge redistribution contains all components for use in a multichannel, uses a simple serial port interface (SPI) for writing is housed in a tiny 20-lead LFCSP with operation ©2008–2011 Analog Devices, Inc. All rights reserved. AD7699 ...
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... Read/Write Spanning Conversion Without a Busy Indicator ....................................................................................................... 23 General Timing With a Busy Indicator ................................... 24 Read/Write Spanning Conversion with a Busy Indicator..... 25 Application Hints ........................................................................... 26 Layout .......................................................................................... 26 Evaluating AD7699 Performance............................................. 26 Outline Dimensions ....................................................................... 27 Ordering Guide .......................................................................... 27 Rev Page Data Sheet ...
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... MIN MAX Min 16 0 −V /2 REF −0.1 −0 − 0.1 REF −1.5 −1 −10 −3 −10 − Rev Page AD7699 Typ Max Unit Bits +V V REF + REF V + 0.1 V REF +0 0.1 V REF REF ...
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... AD7699 Parameter Conditions/Comments INTERNAL REFERENCE REF Output Voltage @ 25°C 6 REFIN Output Voltage @ 25°C REF Output Current Temperature Drift Line Regulation VDD = 5 V ± 5% Long-Term Drift 1000 hours Turn-On Settling Time CREF = 10 μF EXTERNAL REFERENCE Voltage Range REF input REFIN input (buffered) ...
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... T , unless otherwise noted. MIN MAX Min Typ Max 1.6 400 DSDO 1.4V t DELAY VIO – 0.5V 2 0.8V OR 0.5V AD7699 Unit μs ns μs ns μ ...
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... AD7699 ABSOLUTE MAXIMUM RATINGS Table 4. Parameter Rating Analog Inputs INx, 1 COM 1 GND − 0 VDD + 0 VDD ± 130 mA REF, REFIN GND − 0 VDD + 0.3 V Supply Voltages VDD, VIO to GND −0 VDD to VIO ±7 V DIN, CNV, SCK to GND −0 VIO + 0.3 V SDO to GND − ...
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... GND 4 12 DIN TOP VIEW GND 5 11 CNV (Not to Scale) NOTES 1. THE EXPOSED PADDLE IS NOT CONNECTED INTERNALLY. FOR INCREASED RELIABILITY OF THE SOLDER JOINTS RECOMMENDED THAT THE PAD BE SOLDERED TO THE GND PLANE. Figure 4. Pin Configuration /2 V. REF Rev Page AD7699 ...
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... AD7699 TYPICAL PERFORMANCE CHARACTERISTICS VDD = 5V, VREF = 5V, VIO = VDD, unless otherwise noted 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 0 16,384 32,768 CODES Figure 5. Integral Nonlinearity vs. Code 250,000 220,840 200,000 150,000 100,000 50,000 26,926 13,341 7FF9 7FFA 7FFB 7FFC 7FFD 7FFE 7FFF 8000 CODE IN HEX Figure 6 ...
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... FREQUENCY (kHz) Figure 15. ENOB vs. Frequency f = 20kHz SFDR SFDR, V REF THD THD 4.096V REF REF –55 –35 – TEMPERATURE (°C) Figure 16. THD, SFDR vs. Temperature AD7699 400 450 500 400 450 500 115 = 5V REF 110 = 4.096V 105 100 95 105 125 ...
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... AD7699 20kHz IN SNR 92 SINAD 90 ENOB 88 86 4.0 4.5 5.0 REFERENCE VOLTAGE (V) Figure 17. SNR, SINAD, ENOB vs. Reference Voltage 20kHz REF SNR 93 92 SINAD 91 90 ENOB –10 –8 –6 –4 INPUT LEVEL (dB) Figure 18. SNR, SINAD, and ENOB vs. Input Level 3 2 UNIPOLAR GAIN ...
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... TEMPERATURE (°C) Figure 23. Internal Reference Output Voltage vs. Temperature, Three devices 65 85 105 125 Rev Page VDD = 5V, 85°C 10 VDD = 5V, 25° SDO CAPACITIVE LOAD (pF) Figure 24. t Delay vs. SDO Capacitance Load and Supply DSDO AD7699 100 120 ...
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... AD7699 TERMINOLOGY Least Significant Bit (LSB) The LSB is the smallest increment that can be represented by a converter. For an analog-to-digital converter with N bits of resolution, the LSB expressed in volts is V (V) = REF LSB N 2 Integral Nonlinearity Error (INL) INL refers to the deviation of each individual code from a line drawn from negative full scale through positive full scale. The point used as negative full scale occurs ½ ...
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... SCK, is not required for the conversion process. Rev Page SWITCHES CONTROL LSB SW+ BUSY CONTROL COMP LOGIC OUTPUT CODE LSB SW– CNV is a successive approximation ADC based on a /4, ... V /32,768). The control logic toggles these REF AD7699 has an on-board conversion clock, the AD7699 ...
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... This is also the code for an overranged analog input ((INx+) − (INx−), or COM, above V 4 This is also the code for an underranged analog input ((INx+) − (INx−), or COM, below V TWOS COMPLEMENT 011...111 011...110 011...101 /2 or REF AD7699 is shown in 100...010 100...001 100...000 1 Digital Output Code (Straight Binary Hex) 3 0xFFFF ...
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... GND IS USUALLY A 10µF CERAMIC CAPACITOR (X5R). Figure 28. Typical Application Diagram Using Bipolar Input Rev Page 1.8V TO VDD 100nF VIO DIN MOSI SCK SCK MISO SDO SS CNV 5V 1.8V TO VDD 100nF 100nF VIO DIN MOSI SCK SCK SDO MISO CNV SS AD7699 ...
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... ANALOG INPUTS Input Structure Figure 29 shows an equivalent circuit of the input structure of the AD7699. The two diodes, D1 and D2, provide ESD protection for the analog inputs, IN[7:0] and COM. Care must be taken to ensure that the analog input signal does not exceed the supply rails by more than 0.3 V because this causes the diodes to become forward-biased and to start conducting current ...
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... IN1 = IN1+ and IN0 = IN1−, IN1−, CFG[9:7] = 000 2 CFG[9:7] = 001 . 2 • Figure 31D, inputs configured in any of the above combinations (showing that the AD7699 can be configured dynamically). Sequencer IN0 The IN1 channels in a IN0 to IN[7:0] fashion. Channels are scanned as IN2 ...
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... AD7699 −3dB (14.7 MHz in full BW or 670 kHz in ¼ BW) or the cutoff frequency of an input filter, if one is used the noise gain of the amplifier (for example buffer configuration the equivalent input noise voltage of the op amp nV/√ ...
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... AD8031 The placement of the reference decoupling capacitor is also important to the performance of the AD7699, as explained in the Layout section. Mount the decoupling capacitor on the same side as the ADC at the REF pin with a thick PCB trace. The GND should also connect to the reference decoupling capacitor with the shortest distance and to the analog ground plane with several vias ...
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... CNV is high. Thus, the host must perform two bursts of data access when using this method. CONFIGURATION REGISTER, CFG The AD7699 detailed in Table 8 for configuring the inputs, the channel to be converted, one-pole filter bandwidth, the reference, and the channel sequencer. The CFG register is latched (MSB first) on DIN with 14 SCK rising edges ...
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... External reference, internal buffer, temperature disabled. Function Disable sequencer. Update configuration during sequence. Scan IN0 to IN[7:0] (set in CFG[9:7]), then temperature. Scan IN0 to IN[7:0] (set in CFG[9:7]). Rev Page REF REF REF SEQ /2 ± 0.1 V. REF /2 ± 0.1 V. REF section. temperature disabled . AD7699 1 0 SEQ RB ...
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... A TOTAL OF 16 SCK FALLING EDGES IS REQUIRED TO RETURN SDO TO HIGH-Z. IF CFG READBACK IS ENABLED, A TOTAL OF 30 SCK FALLING EDGES IS REQUIRED TO RETURN SDO TO HIGH-Z. Figure 35. General Interface Timing for the AD7699 Without a Busy Indicator MSB of the current conversion. For detailed timing, refer to Figure 36 and Figure 37, which depict reading/writing spanning conversion with all timing details, including setup, hold, and SCK ...
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... THE LSB IS FOR CONVERSION RESULTS OR THE CONFIGURATION REGISTER CFG (n – 1) IF. 15 SCK FALLING EDGES = LSB OF CONVERSION RESULTS. 29 SCK FALLING EDGES = LSB OF CONFIGURATION REGISTER. ON THE 16TH OR 30TH SCK FALLING EDGE, SDO IS DRIVEN TO HIGH IMPENDANCE. AD7699 Without a Busy Indicator Rev Page time of the next conversion elapses. All 14 bits ...
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... LSB . DATA remains. Because the transition noise of the AD7699 is 4 LSBs peak to peak (or greater), the LSB is low 50% of the time. For this interface, the SPI host needs to burst 24 SCKs QSPI interface can be used and programmed for 17 SCKs. ...
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... SCK FALLING EDGES = LSB OF CONFIGURATION REGISTER. ON THE 17TH OR 31st SCK FALLING EDGE, SDO IS DRIVEN TO HIGH IMPENDANCE. OTHERWISE, THE LSB REMAINS ACTIVE UNTIL THE BUSY INDICATOR IS DRIVEN LOW. Figure 40. Serial Interface Timing for the AD7699 Rev Page time elapses for the next conversion. All 14 bits of DATA ...
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... The pinout of the AD7699, with all its analog signals on the left side and all its digital signals on the right side, eases this task. Avoid running digital lines under the device because these couple noise onto the die unless a ground plane under the used as a shield ...
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... LFCSP_VQ Evaluation Board Controller Board Rev Page 2.65 EXPOSED 2.50 SQ PAD 2. 0.25 MIN FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. Package Option CP-20-4 CP-20-4 AD7699 Ordering Quantity Tray, 490 Reel, 1500 ...
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... AD7699 NOTES ©2008–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07354-0-9/11(A) Rev Page Data Sheet ...