AD7851 Analog Devices, AD7851 Datasheet - Page 29

• Manufacturer Part Number: AD7851
• Description: 14-Bit, 333 kSPS, Serial Sampling A/D Converter
• Manufacturer: Analog Devices

Specifications of AD7851

• Resolution (bits): 14bit
• # Chan: 1
• Sample Rate: 333kSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni
• Ain Range: (Vref) p-p,Uni (Vref)
• Adc Architecture: SAR
• Pkg Type: DIP,SOIC,SOP

Writing to the AD7851
For accessing the on-chip registers, it is necessary to write to the
part. To enable Serial Interface Mode 1, the user must also write
to the part. Figures 41, 42, and 43 shows how to configure the
AD7851 for each of the different serial interface modes. The
continuous loops on all diagrams indicate the sequence for more
than one conversion. The options of using a hardware (pulsing
the CONVST pin) or software (setting the CONVST bit to 1)
conversion start, and reading/writing during or after conversion
are shown in Figures 41 and 42. If the CONVST pin is never
used, then it should be tied to DV
REV. B
SCLK, READ PREVIOUS CONVERSION
AND WRITE ALL 0s ON DIN PIN
WAIT APPROXIMATELY 200ns
AFTER CONVST RISING EDGE
APPLY SYNC (IF REQUIRED),
RESULT ON DOUT PIN,
Figure 41. Flowchart for Setting Up, Reading, and Writing in Interface Modes 2 and 3
CURRENT CONVERSION RESULT ON DOUT PIN,
APPLY SYNC (IF REQUIRED), SCLK, READ
WAIT FOR AUTOMATIC CALIBRATION
POWER ON, APPLY CLKIN SIGNAL,
YES
LOW OR WAIT FOR BUSY BIT = 0
WAIT FOR BUSY SIGNAL TO GO
AND WRITE ALL 0s ON DIN PIN
DD
PULSE CONVST PIN
CONVERSION
CONVERSION
SOFTWARE
permanently. Where refer-
INTERFACE
TRANSFER
INITIATE
DURING
START
SERIAL
DATA
MODE
IN
?
?
?
NO
NO
2, 3
YES
APPLY SYNC (IF REQUIRED), SCLK, WRITE TO CONTROL
REGISTER SETTING CONVST BIT TO 1, READ CURRENT
–29–
NOTE: WHEN USING THE SOFTWARE CONVERSION START AND
TRANSFERRING DATA DURING CONVERSION, THE USER MUST ENSURE
THE CONTROL REGISTER WRITE OPERATION EXTENDS BEYOND THE
FALLING EDGE OF BUSY. THE FALLING EDGE OF BUSY RESETS THE
CONVST BIT TO 0 AND ONLY AFTER THIS TIME CAN IT BE REPROGRAMMED
TO 1 TO START THE NEXT CONVERSION.
CONVERSION RESULT ON DOUT PIN
WAIT FOR BUSY SIGNAL TO GO LOW
ence is made to the BUSY bit equal to a Logic 0, to indicate the
end of conversion, the user in this case would poll the BUSY bit
in the status register.
Interface Modes 2 and 3 Configuration
Figure 41 shows the flowchart for configuring the part in Inter-
face Modes 2 and 3. For these interface modes, the read and
write operations take place simultaneously via the serial port.
Writing all 0s ensures that no valid data is written to any of the
registers. When using the software conversion start and transfer-
ring data during conversion, the Figure 41 note must be obeyed.
OR WAIT FOR BUSY BIT = 0
DATA DURING
CONVERSION
TRANSFER
NO
APPLY SYNC (IF REQUIRED), SCLK, WRITE TO CONTROL
REGISTER SETTING CONVST BIT TO 1, READ PREVIOUS
CONVERSION RESULT ON DOUT PIN (SEE NOTE)
YES
AD7851