AD7858 Analog Devices, AD7858 Datasheet - Page 3

• Manufacturer Part Number: AD7858
• Description: 3 V to 5 V Single Supply, 200 kSPS, 8-Channel, 12-Bit, Serial Sampling ADC
• Manufacturer: Analog Devices

Specifications of AD7858

• Resolution (bits): 12bit
• # Chan: 8
• Sample Rate: 200kSPS
• Interface: Ser,SPI
• Analog Input Type: SE-Uni
• Ain Range: (Vref) p-p,Uni (Vref)
• Adc Architecture: SAR
• Pkg Type: DIP,SOIC

Parameter
DYNAMIC PERFORMANCE
SYSTEM CALIBRATION
NOTES
1
2
3
4
5
6
7
Specifications subject to change without notice.
The Offset and Gain Calibration Spans are defined as the range of offset and gain errors that the AD7858/AD7858L can calibrate. Note also that these are voltage
Temperature ranges as follows: A, B Versions: –40°C to +85°C. For L Versions, A and B Versions f
B Version f
Specifications apply after calibration.
SNR calculation includes distortion and noise components.
Sample tested @ +25°C to ensure compliance.
All digital inputs @ DGND except for CONVST, SLEEP, CAL, and SYNC @ DV
CLKIN @ DGND when external clock off. All digital inputs @ DGND except for CONVST, SLEEP, CAL, and SYNC @ DV
outputs. Analog inputs @ AGND.
spans and are not absolute voltages ( i.e., the allowable system offset voltage presented at AIN(+) for the system offset error to be adjusted out will be AIN(–)
± 0.05 × V
V
REF
AV
I
Normal-Mode Power Dissipation
Sleep Mode Power Dissipation
Offset Calibration Span
Gain Calibration Span
DD
Normal Mode
Sleep Mode
With External Clock On
With External Clock Off
DD,
± 0.025 × V
With External Clock On
With External Clock Off
DV
REF
CLKIN
DD
, and the allowable system full-scale voltage applied between AIN(+) and AIN(–) for the system full-scale voltage error to be adjusted out will be
= 1.8 MHz over 0°C to +70°C temperature range.
REF
6
5
). This is explained in more detail in the Calibration section of the data sheet.
7
7
A Version
+3.0/+5.5
6 (1.9)
5.5 (1.9)
10
400
5
200
33 (10.5)
20 (6.85)
55
36
27.5
18
+0.05 × V
+1.025 × V
REF
1
REF
/–0.05 × V
/–0.975 × V
B Version
+3.0/+5.5
6 (1.9)
5.5 (1.9)
10
400
5
200
33 (10.5)
20 (6.85)
55
36
27.5
18
REF
REF
1
DD
Units
V min/max
mA max
mA max
µA typ
µA typ
µA max
µA typ
mW max
mW max
µW typ
µW typ
µW max
µW max
V max/min
V max/min
. No load on the digital outputs. Analog inputs @ AGND.
CLKIN
Test Conditions/Comments
AV
AV
Full Power-Down. Power Management Bits in Control
Register Set as PMGT1 = 1, PMGT0 = 0
Partial Power-Down. Power Management Bits in
Control Register Set as PMGT1 = 1, PMGT0 = 1
Typically 1 µA. Full Power-Down. Power Management Bits
in Control
Register Set as PMGT1 = 1, PMGT0 = 0
Partial Power-Down. Power Management Bits in Control
Register Set as PMGT1 = 1, PMGT0 = 1
V
V
V
V
V
V
Allowable Offset Voltage Span for Calibration
Allowable Full-Scale Voltage Span for Calibration
DD
DD
DD
DD
DD
DD
DD
DD
= 1 MHz over –40°C to +85°C temperature range,
= 5.5 V. Typically 25 mW (8); SLEEP = V
= 3.6 V. Typically 15 mW (5.4); SLEEP = V
= 5.5 V. SLEEP = 0 V
= 3.6 V. SLEEP = 0 V
= 5.5 V. Typically 5.5 µW; SLEEP = 0 V
= 3.6 V. Typically 3.6 µW; SLEEP = 0 V
= DV
= DV
DD
DD
= 4.5 V to 5.5 V. Typically 4.5 mA (1.5)
= 3.0 V to 3.6 V. Typically 4.0 mA (1.5 mA)
DD
. No load on the digital
AD7858/AD7858L
DD
DD