AD5735 Analog Devices, AD5735 Datasheet - Page 11

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AD5735

Manufacturer Part Number
AD5735
Description
Quad Channel, 12-Bit, Serial Input, 4-20 mA & Voltage Output DAC with Dynamic Power Control
Manufacturer
Analog Devices
Datasheet

Specifications of AD5735

Resolution (bits)
12bit
Dac Settling Time
11µs
Max Pos Supply (v)
+33V
Single-supply
No
Dac Type
I or V Out
Dac Input Format
SPI
ABSOLUTE MAXIMUM RATINGS
T
100 mA do not cause SCR latch-up.
Table 4.
Parameter
AV
AV
AV
AV
DV
Digital Inputs to DGND
Digital Outputs to DGND
REFIN, REFOUT to AGND
V
+V
I
SW
AGND, GNDSW
Operating Temperature Range (T
Storage Temperature Range
Junction Temperature (T
Power Dissipation
Lead Temperature
1
OUT_x
Data Sheet
Power dissipated on chip must be derated to keep the junction temperature
below 125°C.
OUT_x
A
Industrial
Soldering
DD
SS
DD
CC
SENSE_x
DD
= 25°C, unless otherwise noted. Transient currents of up to
x
to AGND
, V
to AGND, DGND
to AGND
to AV
to AGND
to DGND
to AGND
BOOST_x
, −V
SS
SENSE_x
1
to AGND, DGND
x
to DGND
to AGND
J
max)
A
)
Rating
−0.3 V to +33 V
+0.3 V to −28 V
−0.3 V to +60 V
−0.3 V to +7 V
−0.3 V to +7 V
−0.3 V to DV
(whichever is less)
−0.3 V to DV
(whichever is less)
−0.3 V to AV
(whichever is less)
AV
the dc-to-dc converter
AV
the dc-to-dc converter
AV
the dc-to-dc converter
−0.3 V to +33 V
−0.3 V to +0.3 V
−40°C to +105°C
−65°C to +150°C
125°C
(T
JEDEC industry standard
J-STD-020
J
SS
SS
SS
max − T
to V
to V
to V
BOOST_x
BOOST_x
BOOST_x
A
)/θ
DD
DD
DD
+ 0.3 V or +7 V
or 33 V if using
or 33 V if using
or 33 V if using
JA
+ 0.3 V or +7 V
+ 0.3 V or +7 V
Rev. A | Page 11 of 48
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
Junction-to-air thermal resistance (θ
4-layer test board.
Table 5. Thermal Resistance
Package Type
64-Lead LFCSP (CP-64-3)
ESD CAUTION
JA
θ
20
) is specified for a JEDEC
JA
Unit
°C/W
AD5735

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