AD5061 Analog Devices, AD5061 Datasheet - Page 5

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AD5061

Manufacturer Part Number
AD5061
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD5061

Resolution (bits)
16bit
Dac Update Rate
1.3MSPS
Dac Settling Time
4µs
Max Pos Supply (v)
+5.5V
Single-supply
Yes
Dac Type
Voltage Out
Dac Input Format
Ser,SPI

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TIMING CHARACTERISTICS
V
Table 3.
Parameter
t
t
t
t
t
t
t
t
t
1
2
1
2
3
4
5
6
7
8
9
All input signals are specified with tr = tf = 1 ns/V (10% to 90% of V
Maximum SCLK frequency is 30 MHz.
2
DD
= 2.7 V to 5.5 V, all specifications T
SCLK
SYNC
DIN
Limit
33
5
3
10
3
2
0
12
9
1
t
8
t
4
D23
MIN
Unit
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
to T
D22
MAX
t
3
, unless otherwise specified.
t
2
DD
) and timed from a voltage level of (V
Figure 2. Timing Diagram
t
1
Test Conditions/Comments
SCLK cycle time
SCLK high time
SCLK low time
SYNC to SCLK falling edge set-up time
Data set-up time
Data hold time
SCLK falling edge to SYNC rising edge
Minimum SYNC high time
SYNC rising edge to next SCLK fall ignore
Rev. B | Page 5 of 20
D2
t
5
D1
t
6
D0
t
7
IL
t
9
+ V
IH
)/2.
D23
D22
AD5061

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