ADUC834 Analog Devices, ADUC834 Datasheet - Page 48

• Manufacturer Part Number: ADUC834
• Description: Precision Analog Microcontroller: 1MIPS 8052 MCU + 62kB Flash + 16/24-Bit ADC + 12-Bit DAC
• Manufacturer: Analog Devices

Specifications of ADUC834

• Mcu Core: 8052
• Mcu Speed (mips): 1
• Sram (bytes): 2304Bytes
• Gpio Pins: 34
• Adc # Channels: 4
• Other: PWM

DUAL DATA POINTER
The ADuC834 incorporates two data pointers. The second data
pointer is a shadow data pointer and is selected via the data
pointer control SFR (DPCON). DPCON also includes features
such as automatic hardware post-increment and post-decrement,
as well as automatic data pointer toggle. DPCON is described
in Table XXIII.
ADuC834
Bit
7
6
5
4
3
2
1
0
NOTES
1. This is the only place where the main and shadow data pointers are distinguished. Everywhere else in this data sheet, wherever the DPTR is mentioned, operation
2. Only MOVC/MOVX @DPTR instructions are relevant above. MOVC/MOVX PC/@Ri instructions will not cause the DPTR to automatically post increment/decrement,
on the active DPTR is implied.
and so on. To illustrate the operation of DPCON, the following code will copy 256 bytes of code memory at Address D000h into XRAM starting from Address 0000h.
the code uses 16 bytes and 2054 cycles. To perform this on a standard 8051 requires approximately 33 bytes and 7172 cycles (depending on how it is implemented).
MOV
MOV
MOV
DPTR,#0
DPCON,#55h
DPTR,#0D000h
Name
–––
DPT
DP1m1
DP1m0
DP0m1
DP0m0
–––
DPSEL
; Main DPTR = 0
; Select shadow DPTR
; DPTR1 increment mode,
; DPTR0 increment mode
; DPTR auto toggling ON
; Shadow DPTR = D000h
Description
Reserved for Future Use
Data Pointer Automatic Toggle Enable.
Cleared by user to disable auto swapping of the DPTR.
Set in user software to enable automatic toggling of the DPTR after each MOVX or MOVC instruction.
Shadow Data Pointer Mode
These two bits enable extra modes of the shadow data pointer operation allowing for more compact
and more efficient code size and execution.
m1
0
0
1
1
Main Data Pointer Mode
These two bits enable extra modes of the main data pointer operation allowing for more compact and
more efficient code size and execution.
m1
0
0
1
1
This bit is not implemented to allow the INC DPCON instruction toggle the data pointer without
incrementing the rest of the SFR.
Data Pointer Select.
Cleared by user to select the main data pointer. This means that the contents of the main 24-bit DPTR
appears in the 3 SFRs DPL, DPH, and DPP.
Set by the user to select the shadow data pointer. This means that the contents of the shadow 24-bit
DPTR appears in the 3 SFRs DPL, DPH, and DPP.
Table XXIII. DPCON SFR Bit Designations
m0
0
1
0
1
m0
0
1
0
1
Behavior of the Shadow Data Pointer
8052 Behavior
DPTR is post-incremented after a MOVX or a MOVC instruction
DPTR is post-decremented after a MOVX or MOVC instruction
DPTR LSB is toggled after a MOVX or MOVC instruction
(This instruction can be useful for moving 8-bit blocks to/from 16-bit devices)
Behavior of the Main Data Pointer
8052 Behavior
DPTR is post-incremented after a MOVX or a MOVC instruction
DPTR is post-decremented after a MOVX or MOVC instruction
DPTR LSB is toggled after a MOVX or MOVC instruction
(This instruction can be useful for moving 8-bit blocks to/from 16-bit devices)
–48–
DPCON
SFR Address
Power-On Default Value
Bit Addressable
MOVELOOP:
CLR
MOVC A,@A+DPTR
MOVX @DPTR,A
MOV
JNZ
A
A, DPL
MOVELOOP
Data Pointer Control SFR
A7H
00H
No
; Get data
; Post Inc DPTR
; Swap to Main DPTR (Data)
; Put ACC in XRAM
; Increment main DPTR
; Swap to Shad DPTR (Code)
REV. A