LPC1114FBD48 NXP Semiconductors, LPC1114FBD48 Datasheet - Page 2

• Manufacturer Part Number: LPC1114FBD48
• Description: The LPC1114FBD48 is an ARM Cortex-M0 microcontroller and it can operate up to 50 MHz
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC111X
Product data sheet
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Analog peripherals:
Serial interfaces:
Clock generation:
Power control:
Unique device serial number for identification.
Single power supply (1.8 V to 3.6 V).
Available as LQFP48 package and HVQFN33 package.
LPC1100L series available as TSSOP28 package, DIP28 package, TSSOP20
package, and SO20 package.
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GPIO pins can be used as edge and level sensitive interrupt sources.
High-current output driver (20 mA) on one pin.
High-current sink drivers (20 mA) on two I
LPC1112FDH20/102).
Four general purpose counter/timers with up to eight capture inputs and up to 13
match outputs.
Programmable WatchDog Timer (WDT) the LPC1100 series only.
Programmable windowed WDT on the LPC1100L and LPC1100XL series only.
10-bit ADC with input multiplexing among 5, 6, or 8 pins depending on package
size.
UART with fractional baud rate generation, internal FIFO, and RS-485 support.
Two SPI controllers with SSP features and with FIFO and multi-protocol
capabilities (second SPI on LPC1100 and LPC1100L series LQFP48 package
only).
I
data rate of 1 Mbit/s with multiple address recognition and monitor mode (not on
LPC1112FDH20/102).
12 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used
as a system clock.
Crystal oscillator with an operating range of 1 MHz to 25 MHz.
Programmable watchdog oscillator with a frequency range of 7.8 kHz to 1.8 MHz.
PLL allows CPU operation up to the maximum CPU rate without the need for a
high-frequency crystal. May be run from the system oscillator or the internal RC
oscillator.
Clock output function with divider that can reflect the system oscillator clock, IRC
clock, CPU clock, and the Watchdog clock.
Integrated PMU (Power Management Unit) to minimize power consumption during
Sleep, Deep-sleep, and Deep power-down modes.
Power profiles residing in boot ROM allowing to optimize performance and
minimize power consumption for any given application through one simple function
call. (LPC1100Land LPC1100XL series only.)
Three reduced power modes: Sleep, Deep-sleep, and Deep power-down.
Processor wake-up from Deep-sleep mode via a dedicated start logic using up to
13 of the functional pins.
Power-On Reset (POR).
Brownout detect with four separate thresholds for interrupt and forced reset.
2
C-bus interface supporting full I
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 1 March 2012
LPC1110/11/12/13/14/15
2
C-bus specification and Fast-mode Plus with a
2
32-bit ARM Cortex-M0 microcontroller
C-bus pins in Fast-mode Plus (not on
© NXP B.V. 2012. All rights reserved.
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