LPC2290 NXP Semiconductors, LPC2290 Datasheet - Page 17

• Manufacturer Part Number: LPC2290
• Description: The LPC2290 microcontroller is based on a 16/32-bit ARM7TDMI-S CPU with real-timeemulation and embedded trace support
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2290_3
Product data sheet
6.7.1 Features
6.5 Pin connect block
6.6 External memory controller
6.7 General purpose parallel I/O and Fast I/O
Table 4.
The pin connect block allows selected pins of the microcontroller to have more than one
function. Configuration registers control the multiplexers to allow connection between the
pin and the on-chip peripherals. Peripherals should be connected to the appropriate pins
prior to being activated, and prior to any related interrupt(s) being enabled. Activity of any
enabled peripheral function that is not mapped to a related pin should be considered
undefined.
The external Static Memory Controller is a module which provides an interface between
the system bus and external (off-chip) memory devices. It provides support for up to four
independently configurable memory banks (16 MB each with byte lane enable control)
simultaneously. Each memory bank is capable of supporting SRAM, ROM, flash EPROM,
burst ROM memory, or some external I/O devices.
Each memory bank may be 8-bit, 16-bit, or 32-bit wide.
Device pins that are not connected to a specific peripheral function are controlled by the
GPIO registers. Pins may be dynamically configured as inputs or outputs. Separate
registers allow setting or clearing any number of outputs simultaneously. The value of the
output register may be read back, as well as the current state of the port pins.
Block
SPI1/SSP
PLL
RTC
System Control
A/D
CAN
•
•
Direction control of individual bits.
Separate control of output set and clear.
Interrupt sources
Flag(s)
Source: SPI1 SPI Interrupt Flag (SPIF), Mode Fault (MODF) 11
Source: SSP (available in LPC2290/01 only)
TX FIFO at least half empty (TXRIS)
RX FIFO at least half full (RXRIS)
Receive Timeout condition (RTRIS)
Receive Overrun (RORRIS)
PLL Lock (PLOCK)
RTCCIF (Counter Increment), RTCALF (Alarm)
External Interrupt 0 (EINT0)
External Interrupt 1 (EINT1)
External Interrupt 2 (EINT2)
External Interrupt 3 (EINT3)
ADC
1 ORed CAN Acceptance Filter
CAN1 (TX int, RX int)
CAN2 (TX int, RX int)
Rev. 03 — 16 November 2006
16/32-bit ARM microcontroller with external memory interface
…continued
LPC2290
© NXP B.V. 2006. All rights reserved.
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