STM8S007C8 STMicroelectronics, STM8S007C8 Datasheet - Page 24

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STM8S007C8

Manufacturer Part Number
STM8S007C8
Description
Value line, 24 MHz STM8S 8-bit MCU, 64 Kbytes Flash, true data EEPROM
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM8S007C8

Max Fcpu
up to 24 MHz, 0 wait states @ fCPU≤ 16 MHz
Program
64 Kbytes Flash; data retention 20 years at 55 °C after 100 cycles
Data
128 bytes true data EEPROM; endurance 100 kcycles
Ram
6 Kbytes
Advanced Control Timer
16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization

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Pinouts and pin description
Note:
24/90
Table 5.
1. The default state of UART1_RX and UART3_RX pins is controlled by the ROM bootloader. These pins are
2. In the open-drain output column, ‘T’ defines a true open-drain I/O (P-buffer, weak pull-up, and protection
3. The PD1 pin is in input pull-up during the reset phase and after the internal reset release.
The slope control of true open drain pins cannot be programmed and by default is limited to
2 MHz.
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
pulled up as part of the bootloader activation process and returned to the floating state before a return from
the bootloader.
diode to V
PC6/SPI_MOSI
PC7/SPI_MISO
PG0
PG1
PE3/TIM1_BKIN
PE2/I
PE1/I
PE0/CLK_CCO
PD0/TIM3_CH2
PD1/SWIM
PD2/TIM3_CH1
PD3/TIM2_CH2
PD4/TIM2_CH1/B
EEP
PD5/ UART3_TX
PD6/
UART3_RX
PD7/TLI
Pin name
DD
2
2
C_SDA
C_SCL
LQFP48 pin description (continued)
are not implemented).
(3)
(1)
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
Doc ID 022171 Rev 2
Input
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X HS O3 X
X HS O3 X
X
X
X
X HS O3 X
X HS O3 X
X HS O4 X
X HS O3 X
X HS O3 X
X HS O3 X
X
X
X
Output
O1 X
O1 X
O1 X
O1 T
O1 T
O1 X
O1 X
O1 X
(2)
(2)
X Port C6
X Port C7
X Port G0
X Port G1
X Port E3
X Port E0
X Port D0
X Port D1
X Port D2
X Port D3
X Port D4
X Port D5
X Port D6
X Port D7
Port E2 I
Port E1 I
SPI master
out/
slave in
SPI master in/
slave out
Timer 1 -
break input
Configurable
clock output
Timer 3 -
channel 2
SWIM data
interface
Timer 3 -
channel 1
Timer 2 -
channel 2
Timer 2 -
channel 1
UART3 data
transmit
UART3 data
receive
Top level
interrupt
2
2
C data
C clock
alternate
function
Default
STM8S007C8
TIM1_BKIN
[AFR3]/
CLK_CCO
[AFR2]
TIM2_CH3
[AFR1]
ADC_ETR
[AFR0]
BEEP output
[AFR7]
after remap
[option bit]
Alternate
function

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