ST7MC2S6 STMicroelectronics, ST7MC2S6 Datasheet - Page 152
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ST7MC2S6
Manufacturer Part Number
ST7MC2S6
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
Manufacturer
STMicroelectronics
Datasheet
1.ST7MC1K4.pdf
(309 pages)
Specifications of ST7MC2S6
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
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ST7MC1xx/ST7MC2xx
MOTOR CONTROLLER (Cont’d)
Table 30
ZVD and CPB bits. In most cases, the D and Z
events have opposite edge polarity, so the ZVD bit
is usually 0.
Table 30. ZVD and CPB Edge Selection Bits
Legend:
DWF= D window filter
DEF= D event filter
ZWF = Z window filter
ZEF = Z event filter
Refer also to
152/309
1
ZVD bit
0
0
1
1
shows the event control selected by the
Table 34 on page
Note: The ZVD bit is located in the MPOL register, the CPB bit is in the MCRB register.
CPB bit
0
1
0
1
162.
C
C
C
C
DWF
DWF
DWF
DWF
DEF
DEF
DEF
DEF
Event generation vs input data sampled
ZWF
ZWF
ZWF
ZWF
D
D
D
D
H
H
H
H
ZEF
ZEF
Z
Z
ZEF
ZEF
Z
Z
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