ST7MC2S6 STMicroelectronics, ST7MC2S6 Datasheet - Page 161
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ST7MC2S6
Manufacturer Part Number
ST7MC2S6
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
Manufacturer
STMicroelectronics
Datasheet
1.ST7MC1K4.pdf
(309 pages)
Specifications of ST7MC2S6
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
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MOTOR CONTROLLER (Cont’d)
In conclusion, there are 4 sampling types that are
available for Z event detection in sensorless
mode.
1. Sampling at the end of the OFF time of the
2. Sampling, at a programmable frequency inde-
3. Sampling during the ON time of the PWM sig-
4. Sampling, at a programmable frequency during
Note 1: The sampling type is applied only for Z
event detection after the D event has occured.
Whatever the sampling type for Z event detection,
the sampling of the signal for D event detection is
Figure 86. Sampling during ON time at f
PWM signal at the PWM frequency
pendent of the PWM state (during ON time or
OFF time of the signal). Sampling is done at
f
nal by adding a delay at PWM frequency
the ON time (addition of a programmable delay)
of the PWM signal. Sampling is done at f
see
SCF
, see
Table
PWM signal
Table
82.
82.
PWM OFF
state
DS[3:0]
SCF
SCF
f
during
ON time
SCF
,
always done at the selected f
Table
ther during ON or OFF time).
different sampling types in sensorless and in sen-
sor mode.
Note 2: When the MOE bit in the MCRA register is
reset (MCOx outputs in reset state), and the SR bit
in the MCRA register is reset (sensorless mode)
and the SPLG bit in the MCRC register is reset
(sampling at PWM frequency) then, depending on
the state of the ZSV bit in the MSCR register, Z
event sampling can run or be stopped (and D
event is sampled).
Note 3: When BEMF sampling is performed at the
end of the PWM signal off-time, the inputs in OFF-
state are grounded or put in HiZ as selected by the
DISS bit in the MSCR register.
Note 4: The ZEF[3:0] event counter in the MZFR
register is active in all configurations.
Current
sample
DS[3:0]
82), independently of the PWM signal (ei-
ST7MC1xx/ST7MC2xx
Table 34
SCF
frequency (see
explains the
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