ST7MC2S6 STMicroelectronics, ST7MC2S6 Datasheet - Page 177
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ST7MC2S6
Manufacturer Part Number
ST7MC2S6
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
Manufacturer
STMicroelectronics
Datasheet
1.ST7MC1K4.pdf
(309 pages)
Specifications of ST7MC2S6
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
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MOTOR CONTROLLER (Cont’d)
Figure 96. Simulated commutation event generation with only 1 Hall effect sensor (SC bit =1)
Note: If the SC bit is set during Z event interrupt,
then the 8*8 bit hardware multiplication result must
be overwritten in the MCOMP register. Otherwise,
Figure 97. Simulated commutation and Z event
in MCOMP-->C
with MTIM once written
hardware multiplication is put
the result of the
SC bit is reset
Z
C
H
Z
After C interrupt
MCOMP is written for C
if MCOMP<=MTIM
Immediate C
C
H
H
and compared
SC set in MCRC
C interrupt
D
C
S
S
generation
C
S
SC bit is set during Z IT
the hardware multiplication is taken
into account but the value in MCOMP
can be overwritten
D
s
event
Z
MCOMP
register
C
s
Z
D
C
H
SC reset in MCRB
Next C event = C
C interrupt
C
when the SC bit is set, the result of the multiplica-
tion is not taken into account after a Z event.
S
C
S
D
H
Z
Z zero-crossing event
D Demagnetisation event
C
C
with 8*8 bit multiplication
H
S
Simulated commutation
Hardware commutation
C
s
SC bit is already set when Z IT
occurs. The hardware multipli-
-cation is not taken into account
A value has to be written
in the MCOMP register
Z
Z zero-crossing event
D Demagnetisation event
C
C
H
S
Simulated commutation
D
Hardware commutation
ST7MC1xx/ST7MC2xx
Z
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