ST7MC2S6 STMicroelectronics, ST7MC2S6 Datasheet - Page 19
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ST7MC2S6
Manufacturer Part Number
ST7MC2S6
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
Manufacturer
STMicroelectronics
Datasheet
1.ST7MC1K4.pdf
(309 pages)
Specifications of ST7MC2S6
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
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Table 2. Hardware Register Map
Address
002Ch
002Dh
003Ch
003Dh
004Ch
004Dh
002Ah
002Bh
002Eh
002Fh
003Ah
003Bh
003Eh
003Fh
004Ah
004Bh
004Eh
004Fh
0024h
0025h
0026h
0027h
0028h
0029h
0030h
0031h
0032h
0033h
0034h
0035h
0036h
0037h
0038h
0039h
0040h
0041h
0042h
0043h
0044h
0045h
0046h
0047h
0048h
0049h
WATCHDOG
TIMER A
TIMER B
FLASH
Block
MCC
ADC
SIM
ITC
ITSPR0
ITSPR1
ITSPR2
ITSPR3
EICR
FSCR
WDGCR
WDGWR
MCCSR
MCCBCR
ADCCSR
ADCDRMSB
ADCDRLSB
TACR2
TACR1
TACSR
TAIC1HR
TAIC1LR
TAOC1HR
TAOC1LR
TACHR
TACLR
TAACHR
TAACLR
TAIC2HR
TAIC2LR
TAOC2HR
TAOC2LR
SICSR
TBCR2
TBCR1
TBCSR
TBIC1HR
TBIC1LR
TBOC1HR
TBOC1LR
TBCHR
TBCLR
TBACHR
TBACLR
TBIC2HR
TBIC2LR
TBOC2HR
TBOC2LR
Register
Label
Interrupt Software Priority Register 0
Interrupt Software Priority Register 1
Interrupt Software Priority Register 2
Interrupt Software Priority Register 3
External Interrupt Control Register
Flash Control/Status Register
Window Watchdog Control Register
Window Watchdog Window Register
Main Clock Control / Status Register
Main Clock Controller: Beep Control Register
Control/Status Register
Data Register MSB
Data Register LSB
Timer A Control Register 2
Timer A Control Register 1
Timer A Control/Status Register
Timer A Input Capture 1 High Register
Timer A Input Capture 1 Low Register
Timer A Output Compare 1 High Register
Timer A Output Compare 1 Low Register
Timer A Counter High Register
Timer A Counter Low Register
Timer A Alternate Counter High Register
Timer A Alternate Counter Low Register
Timer A Input Capture 2 High Register
Timer A Input Capture 2 Low Register
Timer A Output Compare 2 High Register
Timer A Output Compare 2 Low Register
System Integrity Control/Status Register
Timer B Control Register 2
Timer B Control Register 1
Timer B Control/Status Register
Timer B Input Capture 1 High Register
Timer B Input Capture 1 Low Register
Timer B Output Compare 1 High Register
Timer B Output Compare 1 Low Register
Timer B Counter High Register
Timer B Counter Low Register
Timer B Alternate Counter High Register
Timer B Alternate Counter Low Register
Timer B Input Capture 2 High Register
Timer B Input Capture 2 Low Register
Timer B Output Compare 2 High Register
Timer B Output Compare 2 Low Register
Register Name
ST7MC1xx/ST7MC2xx
000x000x b R/W
Status
Reset
FCh
FCh
FCh
FCh
FFh
FFh
FFh
FFh
7Fh
7Fh
FFh
FFh
FFh
FFh
00h
00h
00h
00h
00h
00h
00h
00h
00h
80h
00h
80h
00h
00h
00h
80h
00h
80h
00h
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Read Only
Read Only
R/W
R/W
R/W
Read Only
Read Only
R/W
R/W
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
R/W
R/W
R/W
R/W
R/W
Read Only
Read Only
R/W
R/W
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
R/W
R/W
Remarks
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