DS80C410 Maxim, DS80C410 Datasheet - Page 44

• Manufacturer Part Number: DS80C410
• Description: The DS80C410/DS80C411 network microcontrollers offer the highest integration available in an 8051 device
• Manufacturer: Maxim

ADDRESSING MODES
Three different addressing modes are supported, as selected by the AM1, AM0 bits in the address control (ACON;
9Dh) SFR.
16-Bit Address Mode
The 16-bit address mode accesses memory in a similar manner as a traditional 8051. It is op-code compatible with
the 8051 microprocessor and identical to the byte and cycle count of the Maxim high-speed microcontroller family.
A device operating in this mode can access up to 64kB of program and data memory. The DS80C410 defaults to
this mode following any reset.
24-Bit Paged Address Mode
The 24-bit paged address mode retains binary-code compatibility with the 8051 instruction set, but adds one
machine cycle to the ACALL, LCALL, RET, and RETI instructions with respect to the Maxim high-speed
microcontroller family timing. This is transparent to standard 8051 compilers. Interrupt latency is also increased by
one machine cycle. In this mode, interrupt vectors are fetched from 0000xxh.
24-Bit Contiguous Address Mode
The 24-bit contiguous addressing mode uses a full 24-bit program counter, and all modified branching instructions
automatically save and restore the entire program counter. The 24-bit branching instructions such as ACALL,
AJMP, LCALL, LJMP, MOV DPTR, RET, and RETI instructions require an assembler, compiler, and linker that
specifically supports these features. The INC DPTR is lengthened by one cycle but remains byte-count compatible
with the standard 8051 instruction set.
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Extended Address Generation
External Program Memory Addressing
Since the DS80C410 is not bound to the 8051’s traditional 16-bit address mode, on-chip hardware enhancements
were made to accommodate the larger memory interfaces associated with 24-bit addressing. The DS80C410
provides SFR bits to configure certain port pins as upper address lines and chip enables. The Port 4 control
register (P4CNT; 92h) and Port 6 control register (P6CNT; B2h) control the number of chip enables that are used
and the maximum amount of program memory that can be accessed per chip enable. Tables 3 and 4 illustrate
which port pins are converted to address lines or chip enables as a result of the P4CNT and P6CNT bit settings.
MOVX Instructions Using DPTRn
MOVX Instructions Using @Ri
Addressing Program Memory In 24-Bit
Paged Mode
10-Bit Stack Pointer Mode
www.maxim-ic.com/microcontrollers
AM1:0
00b
01b
1xb
FUNCTION
24-bit contiguous (default if internal ROM enabled)
16-bit (default when internal ROM disabled)
ADDRESS MODE
24-bit paged
for a list of tools that support the DS80C410.
ADDRESS BITS 23–16
MXAX;EAh
AP;9Ch
DPXn
—
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ADDRESS BITS 15–8
ESP;9Bh
P2;A0h
DPHn
—
ADDRESS BITS 7–0
SP;81h
DPLn
—
Ri