CX24118A-12Z,518 NXP Semiconductors, CX24118A-12Z,518 Datasheet - Page 35

• Manufacturer Part Number: CX24118A-12Z,518
• Description: IC SATELLITE TUNER DGTL 36HVQFN
• Manufacturer: NXP Semiconductors
• Type: Satellite Tunerr

Specifications of CX24118A-12Z,518

• Package / Case: 36-VQFN Exposed Pad, 36-HVQFN, 36-SQFN, 36-DHVQFN
• Applications: Set-Top Boxes
• Mounting Type: Surface Mount
• Bus Type: I2C
• Maximum Agc: 90 dB (Typ)
• Maximum Frequency: 2175 MHz
• Minimum Frequency: 925 MHz
• Mounting Style: SMD/SMT
• Function: Satellite
• Noise Figure: 10 dB
• Operating Supply Voltage: 3.3 V
• Supply Voltage (min): 3.13 V
• Supply Voltage (max): 3.47 V
• Minimum Operating Temperature: 0 C
• Maximum Operating Temperature: + 70 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935287217518

NXP Semiconductors
Register 21
CX24118A_N_2
Product data sheet
DCCorrEn
RFVCABCDis
RFVCAOff[1:0]
CPEn
PSEn
BBEn
RFVCAEn
Register
Register
(Hex)
(Hex)
21
POR
POR
00
RF VCA Bias Control Circuit Disable.
The VCA is made up of multiple, parallel, gain stages. When stages are unused, they are either turned off, or
0 = Bias in unused stages is turned off.
1 = Bias in unused stages is not turned off.
RF VCA Offset Select.
00b = –70 dB. Use this setting for maximum signal levels, and when fixed gain settings are desired.
01b = –67 dB.
10b = –64 dB. Use this setting for minimum signal levels.
11b = –61 dB.
Charge Pump Enable.
1 = Enable.
0 = Disable.
Prescaler Enable.
1 = Enable.
0 = Disable.
Baseband Enable.
1 = Enable.
0 = Disable.
DC Offset Correction Enable.
1 = Enable.
0 = Disable.
RF VCA Enable.
1 = Enable.
0 = Disable.
completely disabled by shutting off their bias, according to the state of this bit.
D7
D7
Reserved
D6
D6
Rev. 02 — 8 September 2009
CPEn
D5
D5
Chapter 3: Serial Programming Interface and Registers
PSEn
D4
D4
BBEn
D3
D3
DCCorrEn
D2
D2
Reserved
D1
D1
CX24118A
© NXP B.V. 2009. All rights reserved.
RFVCAEn
D0
D0
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