TMPM380FYDFG Toshiba, TMPM380FYDFG Datasheet - Page 186
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TMPM380FYDFG
Manufacturer Part Number
TMPM380FYDFG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM380FWDFG.pdf
(700 pages)
Specifications of TMPM380FYDFG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
256K
Rom Type
Flash
Ram (kbytes)
16K
Number Of Pins
100
Package
QFP(14×20)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
2
I2c/sio (ch)
2
Uart/sio (ch)
5
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
18
16-bit Timer / Counter
8
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
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9 16-bit Timer/Event Counters (TMRBs)
The channels operate in the same way, except for the differences in their specifications as shown in Table 9-1
to Table 9-3. Therefore, the operational descriptions here are only for channel 0.
9.5
9.5.1
clock φT0 is fperiph, fperiph/2, fperiph/4, fperiph/8, fperiph/16 or fperiph/32 selected by
CGSYSCR<PRCLK2:0> in the CG. The peripheral clock, fperiph, is either fgear, a clock selected by
CGSYSCR<FPSEL> in the CG, or fc, which is a clock before it is divided by the clock gear.
counting and writing “0” clears and stops counting.
resolutions.
Description of Operations for Each Circuit
There is a 4-bit prescaler to generate the source clock for up-counter UC0. The prescaler input
The operation or the stop of a prescaler is set with TB0RUN<TBPRUN> where writing “1” starts
Prescaler
TMPM380/M382 - 20 / 34 -
Table 9-5 show prescaler output clock
TMPM380/M382
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