TMPM380FYDFG Toshiba, TMPM380FYDFG Datasheet - Page 276
TMPM380FYDFG
Manufacturer Part Number
TMPM380FYDFG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM380FWDFG.pdf
(700 pages)
Specifications of TMPM380FYDFG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
256K
Rom Type
Flash
Ram (kbytes)
16K
Number Of Pins
100
Package
QFP(14×20)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
2
I2c/sio (ch)
2
Uart/sio (ch)
5
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
18
16-bit Timer / Counter
8
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
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10 16-bit Multi-purpose Timers (MPTs)
Table 10-8 Port Outputs according to the UOC, VOC, WOC, UPWM, VPWM and WPWM Settings
Bits 5, 3, 1
Bits 5, 3, 1
○ MTPDnMDCR<SYNTMD>=0
○ MTPDnMDCR<SYNTMD>=1
•
Upper
phase
Upper
phase
PMD Output Control Register (MTPDnMDOUT)
<UOC, VOC, WOC>,<UPWM, VPWM,WPWM>: U-, V-, and W-phase output control
Output Control
Output Control
0
0
1
1
0
0
1
1
Read/Write
Read/Write
Read/Write
Read/Write
Bit Symbol
Bit Symbol
Bit Symbol
Bit Symbol
After reset
After reset
After reset
After reset
Polarity: Active high (MDPOT bits 3, 2=1)
Polarity: Active high (MDPOT bits 3, 2=1)
MDOUT
MDOUT
below.)
mode (default) by setting MTPDnMODESEL<MDSEL> to 0.
written separately, operation cannot be guaranteed.
The MTPDnMDOUT register controls the port outputs of the U, V and W phases (see Table 10-8
Bits 4, 2, 0
Bits 4, 2, 0
* To load the second buffer of MTPDnMDOUT with a value updated via the bus, select the bus
* Do not write to this register in byte units. If the upper 8 bits [15:8] and the lower 8 bits [7:0] are
Lower
phase
Lower
phase
0
1
0
1
0
1
0
1
R→0
R→0
R→0
R→0
0x4005 0428, 0x4005 04A8
31
23
15
0
0
0
7
0
-
-
-
-
Upper
phase
output
Upper
phase
output
0: H/L output
0: H/L output
H
H
H
H
L
L
L
L
H/L or PWM Output Select
H/L or PWM Output Select
MDOUT bits 10, 9, 8
MDOUT bits 10, 9, 8
R→0
R→0
R→0
R→0
phase
output
phase
output
Lower
Lower
30
22
14
0
0
0
6
0
-
-
-
-
H
H
H
H
L
L
L
L
Upper
phase
output
/PWM
Upper
phase
output
/PWM
PWM
PWM
PWM
PWM
1: PWM output
1: PWM output
TMPM380/M382 - 76 / 87 -
L
L
R→0
R→0
R→0
29
21
13
0
0
0
5
0
-
-
-
WOC
Lower
phase
output
/PWM
Lower
phase
output
/PWM
/PWM
PWM
PWM
PWM
R/W
L
L
R→0
R→0
R→0
28
20
12
0
0
0
4
0
-
-
-
Bits 5,3,1
Bits 5,3,1
Upper
phase
Upper
phase
Output Control
Output Control
0
0
1
1
0
0
1
1
Polarity: Active low (MDPOT bits 3, 2=0)
Polarity: Active low (MDPOT bits 3, 2=0)
MDOUT
MDOUT
R→0
R→0
R→0
27
19
11
0
0
0
0
3
-
-
-
Bits 4,2,0
Bits 4,2,0
Lower
phase
Lower
phase
VOC
R/W
0
1
0
1
0
1
0
1
WPWM
R→0
R→0
R/W
26
18
10
0
0
0
0
2
-
-
Upper
phase
output
Upper
phase
output
0: H/L output
0: H/L output
H
H
H
H
L
L
L
L
H/L or PWM Output Select
H/L or PWM Output Select
MDOUT bits 10, 9, 8
MDOUT bits 10, 9, 8
VPWM
R→0
R→0
output
output
Lower
phase
Lower
phase
R/W
25
17
0
0
9
0
0
1
-
-
H
H
H
H
L
L
L
L
TMPM380/M382
UOC
R/W
phase
output
phase
output
Upper
/PWM
/PWM
Upper
/PWM
/PWM
PWM
PWM
1: PWM output
1: PWM output
H
H
UPWM
R→0
R→0
R/W
24
16
0
0
8
0
0
0
-
-
Lower
phase
output
/PWM
/PWM
Lower
phase
output
/PWM
PWM
PWM
PWM
H
H
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