STPCC03 STMicroelectronics, STPCC03 Datasheet - Page 24

• Manufacturer Part Number: STPCC03
• Description: STPC CONSUMER-S DATASHEET- PC COMPATIBLE EMBEDDED MICROPROCESSOR
• Manufacturer: STMicroelectronics

STRAP OPTIONS
3.1 Power on strap registers description
3.1.1 Strap register 0 Configuration Index 4Ah
(Strap0)
This register is Reserved.
3.1.2 Strap register 1 Configuration Index 4Bh
(Strap1)
This register is Reserved.
3.1.3 Strap register 2 Configuration Index 4Ch
(Strap2)
Bits 7-5 Reserved .
Bit 4 This bit reflects the value sampled on
MD[20] pin and controls the Dot clock (DCLK)
source as follows:
Note this bit is writeable as well as readable.
Bit 3 This bit reflects the value sampled on
MD[19] pin and controls the Memory clock output
(MCLKO) source as follows:
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Memory
Note; Where the indication hardware appears, the strap options are selected directly on the board by jumpers
or resistances. Refer to the reference schematics for examples.
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
Lines
Data
0: External. DCLK pin is an input.
1: Internal. DCLK pin is an output and
is connected to the internal frequen-
cy synthesizer output.
0: External. MCLKO pin is tristated.
Refer to
CPU
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Designation
CPU Mode
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Issue 1.1 - October 16, 2000
Hardware
Hardware
Hardware
Hardware
Hardware
Hardware
Hardware
Hardware
Hardware
Location
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Bit 2 This bit reflects the value sampled on
MD[18] pin and controls the Host/CPU clock
source as follows:
Bit 1 This bit reflects the value sampled on
MD[17] pin and controls the PCI clock output as
follows:
Bit 0 This bit reflects the value sampled on
MD[16] pin and controls the configuration of
MASTERx and either SD[15:8] (in user mode) or
VIN[7:0] for use in test/debug modes.
This register defaults to the values sampled on
MD[23] & MD[20:16] pins after reset.
User defined
Pull down
Pull down
Pull down
Pull down
Pull down
Settings
Actual
Pull up
Pull up
Pull up
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1: Internal. MCLKO pin is an output
and is connected to the internal fre-
quency synthesizer output.
0: External. HCLK pin is an input.
1: Internal. HCLK pin is an output and
is connected to the internal frequen-
cy synthesizer output.
0: PCI clock output = HCLK / 3
1: PCI clock output = HCLK / 2
0: Configured as test bus.
1: Configured as normal IOs.
Set to ’0’
DX1
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Set to ’1’
DX2
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